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Most of the contemporary MCU providers use eFlash for code storage and over-the-air updates.
But what about future embedded MCU architectures at process nodes below 40nm? What kind of embedded nonvolatile memory (eNVM) will be available at 28nm, 22FDX or even 1X FinFET?
Are companies like SST, Everspin or Crossbar able to deliver below 28nm eNVM IP?
In my opinion STT-MRAM is still far away from being a proven substitute for eFlash. RRAM seems also unable to show competitive eNVM IP products.
FeRAM might be a future player if and only if the historical material issues of FRAM will be overcome. And the brand new 3DX-Point Intel/Micron announcements are quite unclear regarding the real technology behind.
Following out of these questions a bigger one arises.
Will system-in-package (SIP) be a future solution for mobile and IoT chipsets or will SoC with embedded NVM make the race at advanced process nodes?
Any ideas or comments about that...
There's not even much interest in building 40nm mcu's today, due to high sleep current, expensive design processes, problems in packaging too small chips, analog not scaling well, etc etc. For example even infineon which started producing the xmc1000 at 40nm only produced some part at 40nm and some part at 65nm.
As for 28nm , renesas has flash for it.
As for SIP , the only company that does SIP mcu's in a major way is indie-semi(it really help with unique business model of integrating dies to save on custom design costs ). But of course there are other who already use it for dumb phone chips(mediatek) or tiny wifi tranciever(new company) or freescale(integrating power + mcu ). But for regular mcu's , there doesn't seem great interest from majors, so maybe integration is more efficient?
There's not even much interest in building 40nm mcu's today, due to high sleep current, expensive design processes, problems in packaging too small chips, analog not scaling well, etc etc.
Sounds obvious. Thank you!
But what about performance and die-size driven SoC and MCU products? Will an IoT MCU be build at 90nm by 2020?
You wrote analog is not scaling well. Isn't it the same with all kinds of eNVM? To embed more functionality at a below 40nm SoC, what are the current most painful bottlenecks? Only analog components and high standby leakage?
In the case of MCUs I'm quite surprised. I can not imagine that there is simply not much interest to follow "Moore" and constantly delivering MCUs at 65nm or even 90nm targeting 2020.
Assuming your point, MCU and Soc products seem not to have a pressing need to shrink down below 40nm. Will it be the same in highly integrated and power sensitive IoT platforms, where the integration of different IP onto a single-die SoC or MCU might have many advantages over system-in-package products?
Renesas has a large mcu with eflash at 28nm. You can also license their flash, probably expensive(i know ST is working on 28nm STT), and IDK if somebody did so. Atmel built the new cortex-m7 in 65nm in, i would guess because of analog limitations. Also remember, the speed of runing from flash is lower than sram , and might want a lot of ram/flash so maybe for performance you need a mpu , cortex-a5 and external dram/flash are cheaper (OR even SIP) ? Also i'm not sure how big is the market for the M7.
BTW another 40nm mcu is from xmos a startup , they run fully from ram, without flash due to unique multicore architecture that requires high memory bandwidth. so i imagine that with volume they will go to 28nm(if 40nm isn't enough).
Also if you want to see the battle between mcu's and mpu's the best , look at chips for smartwatches and wearables, becuase energy and sleep are important , but for some segments , also performance.
>> Analog isn't scaling well eNVM
I think eNVM scales better, maybe due to more investment, maybe due to physics.
>> 2020
The best academic work i've seen on low power mcu was on 65nm.so considering time from academy to market, maybe that's what we'll have ?
Also another low power enabler is sub-threshold and it's extremely hard to design to that , and to the best of my knowledge startups working at that niche like ambiq micro and psykick are also using 65nm.
Also i wouldn't be surprised to see SIP becoming more important.
Why do you think SoC is a different market regarding embedded NVM IP?
Especially in the mobile SoC segment companies like Qualcomm and Broadcom are heavily investigating eNVM alternatives like STT-MRAM.
Also the scaling issues of Flash and the bad aspect ratio of the peripherals are often mentioned.
Is the SIP usage not only a common workaround when the integration of IP on a single chip doesn't work due to cost or scaling issues?
Why do you think SoC is a different market regarding embedded NVM IP?
Especially in the mobile SoC segment companies like Qualcomm and Broadcom are heavily investigating eNVM alternatives like STT-MRAM.
Also the scaling issues of Flash and the bad aspect ratio of the peripherals are often mentioned.
Is the SIP usage not only a common workaround when the integration of IP on a single chip doesn't work due to cost or scaling issues?
Soc for mobile using require a lot of flash , and than embedded flash become much more expensive than standalone flash , both because of scaling and because it's embedded hence less optimized. For ex. dram requires 4 layers but when you build embedded dram , you need to build much more layers, to accomdate the logic , so it's more expensive.
And about SIP as a work around:
Theoretically , if you could do SIP packaging for free - SIP will win on performance and cost, because it will let you build each part using the most appropriate process.
But SIP costs money , and than it become a tradeoff , depending on context. But SIP solutions have already won in some very tough markets : for ex. mediatek had a sip solutions for dumb phones which probably sold billions, and they are currently offering SIP for smart watches.
As for why do Broadcom and Quallcom investigate eNVM and STT ram ? i don't know, maybe just a bet.
Thanks for the link - quite interesting stuff for me...
...also the eNVM topic is addressed and not surprisingly emerging concepts like perpendicular MRAM and RRAM are pronounced as the most promising candidates for back-end-of-line FDSOI solutions.
Is that mean eFlash is out in FDSOI? Is there an IoT driven need for 28nm eNVM?
Globalfoundries publicly announced a lot of work in the field of 22nm FDSOI technology. To build wireless IoT platforms at the base of that process node the eNVM integration will also be a crucial thing, I guess.
