TSMC 22ULP

[simoncc2]

Today TSMC announced a new technology in 22nm ULP which is actually a shrink of the 28nm HKMG technology.

Overall the technology is offer 15% improvement, 35% power reduction and 10% area benefits over 28HPC+ for the same mask count, Sram bit cell etc... and Vmin is 0.6V.

http://image.noelshack.com/fichiers/2017/11/1489619673-tsmc22.jpg

on different slides the technology is compared to 22FDSOI (GF) and the perf matches exactly between the 2 technologies.


the technology is said to be key for the 5G deployement, being the densest technology with good RF and mmW behavior ( Finfet loosing in high frequency vs planar). Ft is expected to superior to 400Ghz. it is also expected to allow integration of the RF FEM in GaAs in the CMOS SoC ( beamforming application with a HVMOS running at 150Ghz.

In my opinion it is a direction reaction to the 22FDSOI technology from GF, similar to what happened with the 12FFC announced last year to fight 12FDSOI from GF.

as you can see on the slide, TSMC did 800 Taped-outs in 2016 in 28nm nodes, and shipped more than 4.5M wafers in this technology ( not sure if this is during 2016 or since the beginning). Very impressive TSMC !!

 

[lefty]

So, does this make 28nm obsolete? The slide says it beats 28nm HPC+ for power, density and performance, so it would be pointless using 28nm anymore.

 

[Daniel Nenni]

So, does this make 28nm obsolete? The slide says it beats 28nm HPC+ for power, density and performance, so it would be pointless using 28nm anymore.

Maybe, it is really just a renaming of an existing optimized process. What were they going to call it? 28nm HPC++?

Here's the thing, other foundries (UMC/SMIC) have been copying TSMC for years because TSMC has always been the foundry technology leader. Now TSMC is the foundry marketing leader as well. As silly as it sounds marketing does matter, even with technology based manufacturing. Now UMC and SMIC have to explain the process differences and why their 28nm is as good as TSMC's 22nm and it will be an uphill battle. My guess is that SMIC and UMC copy TSMC's marketing as well.

Collateral damage of course is Intel who actually has a better 22nm process.... Same goes with 10nm and 7nm. Do not be surprised when Intel cranks up their marketing engine and strikes back with a new "industry standard" way to measure process names, absolutely.

 

[lefty]

Yep, 22nm ULP will make it difficult for UMC to get 28nm customers, but it doesn't start production until next year, so at least they have time to figure something out.

 

[astilo]

The only problem I see here is that 20nm LPM was a kind of failure because of the extremely high leakage, so this 22nm ULP will not have a successor. On the other hand, the 12 FDX has been already announced. Now, while for many customers, moving from 22 ULP to 7nm FinFet would be anyway an option, for many others will not (due to crazy tape-out costs and poor RF performances of FinFets).
I still believe that GF has an edge this time, assuming they can deliver what promised. You can clearly see the TSMC strategy path here about the GF's FDX. Ignore at first, discredit it as second step and finally be forced to react. My 2 cents. This time they have been too arrogant. This is a typical Intel mistake too.
From a technology point of view, I'm very very curious to see and understand how TSMC managed to reduce the power consumption on a planar node without SOI (I mean, at 20nm that was a pretty serious issue). Time will tell.

 

[michaeldollars]

The discussion highlights the technological and strategic challenges in semiconductor manufacturing, noting the high leakage issue with 20nm LPM and the transition difficulties from 22 ULP to 7nm FinFet due to costs and performance concerns. Despite these hurdles, there's optimism about GF's edge with their 12 FDX technology and curiosity about TSMC's advancements in reducing power consumption at 20nm without SOI. This conversation mirrors the competitive dynamics in the industry, reminiscent of past strategies and mistakes by major players like Intel and now, perhaps, TSMC.

By the way, Baazov: latest on hacker scandal https://wakelet.com/wake/oFPfWNny49Vy8RspOXLkr might provide some interesting context on related industry disruptions.

 

[Barnsley]

Maybe, it is really just a renaming of an existing optimized process. What were they going to call it? 28nm HPC++?

Here's the thing, other foundries (UMC/SMIC) have been copying TSMC for years because TSMC has always been the foundry technology leader. Now TSMC is the foundry marketing leader as well. As silly as it sounds marketing does matter, even with technology based manufacturing. Now UMC and SMIC have to explain the process differences and why their 28nm is as good as TSMC's 22nm and it will be an uphill battle. My guess is that SMIC and UMC copy TSMC's marketing as well.

Collateral damage of course is Intel who actually has a better 22nm process.... Same goes with 10nm and 7nm. Do not be surprised when Intel cranks up their marketing engine and strikes back with a new "industry standard" way to measure process names, absolutely.

So this is bad news for my friends at UMC?

TSMC going to eat their lunch?

 

[Paul2]

The only problem I see here is that 20nm LPM was a kind of failure because of the extremely high leakage, so this 22nm ULP will not have a successor. On the other hand, the 12 FDX has been already announced. Now, while for many customers, moving from 22 ULP to 7nm FinFet would be anyway an option, for many others will not (due to crazy tape-out costs and poor RF performances of FinFets).
I still believe that GF has an edge this time, assuming they can deliver what promised. You can clearly see the TSMC strategy path here about the GF's FDX. Ignore at first, discredit it as second step and finally be forced to react. My 2 cents. This time they have been too arrogant. This is a typical Intel mistake too.
From a technology point of view, I'm very very curious to see and understand how TSMC managed to reduce the power consumption on a planar node without SOI (I mean, at 20nm that was a pretty serious issue). Time will tell.

People completely miss that mixed signal is forever bound to planar. If you want cheap mixed signal SoCs/MCUs in high volumes, you have to forget about exotic RF nodes at specialist fabs.

Only the biggest fabs can make sub-1$ WiFi microcontrollers. WiFi microcontroller makers using speciality foundries no longer make money today.

In between $1 chip, and a $20 chip with a much better RF performance, the market has overwhelmingly chosen the $1 chip. So I think it matters a lot who can provide a better RF performance on a mainstream planar mixed signal node.