I found the snapshots of TSM D0 trend from 2020 Technology Symposium from Anandtech report(https://www.anandtech.com/show/16028/better-yield-on-5nm-than-7nm-tsmc-update-on-defect-rates-for-n5). It is amazing to see the projecting of D0 forN5 will be expected less than 0.1(looks like 0.06) within a year(2021/2H). Amazing!
TSM Defect Density Trend and Projection for 5nm
- Thread starter hskuo
- Start date
Remember, TSMC is doing half steps and killing the learning curve. N10 to N7 to N7+ to N6 to N5 to N4 to N3. Equipment is reused and yield is industry leading. You can thank Apple for that since they require a new process every year and freeze the process based on TTM versus performance or yield like the other semiconductor manufacture giants. It really is a whole new world.
There was a funny question on the TSMC Q&A call. It was asked why TSMC stayed with FinFETs for 3nm versus GAA like Samsung and Intel. The answer is of course because Apple said so. Same reason why TSMC went to 20nm with double patterning then added FinFETs at 16nm. They also did 7nm first then added EUV. Sometimes it pays to be cautious in business, especially the semiconductor business where yield is king and performance is Queen.
There was a funny question on the TSMC Q&A call. It was asked why TSMC stayed with FinFETs for 3nm versus GAA like Samsung and Intel. The answer is of course because Apple said so. Same reason why TSMC went to 20nm with double patterning then added FinFETs at 16nm. They also did 7nm first then added EUV. Sometimes it pays to be cautious in business, especially the semiconductor business where yield is king and performance is Queen.
Daniel: Is the half node unique for TSM only? Does the high tool reuse rate work for TSM only? Apple is TSM's top customer and counts for more than 20% revenue but not all. If Apple was Samsung Foundry's top customer, what will be Samsung's answer? I would say the answer form TSM's top executive is not proper but it is true. If you remembered, who started to show D0 trend in his tech forum? It is intel but seems after 14nm delay, they do not show it anymore. Why? Do we see Samsung show its D0 trend? Interesting.
Half nodes have been around for a long time. Usually it was a process shrink done without celebration to save money for the high volume parts. Now half nodes are a full on process node celebration. Intel calls their half nodes 14+, 14++, and 14+++. For 10nm they rolled out SuperFIN Technology which is a not so clever name for a half node. Remember when Intel called FinFETs Trigate? Another dumb idea that they probably spent millions of dollars on.
Apple was Samsung's top foundry customer. In fact, Samsung designed Apple's first SoCs until Apple was able to make them internally. Apple left Samsung due to IP theft and process delays. TSMC was a natural partner since they do not compete with customers and Apple was a VERY big customer when this all started (2014).
Intel has changed quite a bit since they tried and failed to go head-to-head with TSMC in the foundry business. Same with Samsung and Globalfoundries. Many billions of dollars were spent trying to unseat TSMC but it made them and the surrounding ecosystem even stronger. It really is funny to look back on. Intel, GF and Samsung paid IP and EDA companies MILLIONS of dollars to port IP and EDA tools that were barely used. Money in the bank for the TSMC led ecosystem.
TSMC has talked about D0 ever since I can remember. Intel did as well until the 14nm fiasco. In the past we were not allowed to publish D0 or other technical slides from the TSMC conference without permission. Apparently that is no longer the case but we still asked permission and have not gotten an answer as of yet.
Apple was Samsung's top foundry customer. In fact, Samsung designed Apple's first SoCs until Apple was able to make them internally. Apple left Samsung due to IP theft and process delays. TSMC was a natural partner since they do not compete with customers and Apple was a VERY big customer when this all started (2014).
Intel has changed quite a bit since they tried and failed to go head-to-head with TSMC in the foundry business. Same with Samsung and Globalfoundries. Many billions of dollars were spent trying to unseat TSMC but it made them and the surrounding ecosystem even stronger. It really is funny to look back on. Intel, GF and Samsung paid IP and EDA companies MILLIONS of dollars to port IP and EDA tools that were barely used. Money in the bank for the TSMC led ecosystem.
TSMC has talked about D0 ever since I can remember. Intel did as well until the 14nm fiasco. In the past we were not allowed to publish D0 or other technical slides from the TSMC conference without permission. Apparently that is no longer the case but we still asked permission and have not gotten an answer as of yet.
Arthur Hanson
Well-known member
TSM has truly reached critical mass in several respects and I expect them to further outpace the competition with Apple's finances and marketing muscle which is immense and growing with no sign of a slowdown. I expect medical to be Apple's next mega market, which they have been working on for many years. Interesting things to come, especially with the tremendous sums and increasing on medical world wide. The only fear I see is anti trust action by governments as Apple is the world's largest company and getting larger.
I double checked, they are the ones presented. Those are screen grabs that were not supposed to be published. I asked for the high resolution versions.
Daniel: If this post violated your rule, please delete it.