Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/smic-14-nm-finfet-in-2018.6636/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021770
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

SMIC 14 nm FinFET in 2018?


Highly unlikely. SMIC specializes in "T like" compatible processes which means they copy intellectual property (GDS, design rules etc...). They were caught doing this at .13m and from what I understand 28nm will also be highly scrutinized.

Without "T like" compatibility it will be very hard for SMIC to continue as a second source foundry outside of China no matter how much money the Chinese government gives them. SMIC is also not great at yield ramping so how long will it take for them to be price competitive with TSMC 28nm which now yields at 99.99%? Probably never.

For 14nm SMIC will have to master both DPT and FinFETs since they skipped 20nm. TSMC really made a smart move doing DPT at 20nm and adding FinFETs at 16nm. 16nm Yield from what I hear is at record levels.

"SMIC also revealed risk production of chips made on its 14nm FinFET process could start as early as 2018"

Making that kind of prediction three years out? 14nm production "could" also never happen at all.
 
Last edited:
The question is how you interpret imec and Qualcomm's help. imec is a research institute and although has been working with industry partners, the nature of their work is that they never get the chance to look at yield problems. There is a big difference between a device that you can write an IEDM paper on and a yielding technology that you can ship to customers. Qualcomm has access to what could go wrong in ramping, but unless SMIC exactly copied TSMCs process, that would be a general knowledge as opposed to specifics. It's like "here are a bunch of experienced engineers that had seen problems in the past" as opposed to "here is the recipe, DTCO, etc that guarantees fast yield".
 
All the Factors in Creating A Golden Age of China's IC Industry (Chinese Version)

Looks like they were waiting for EUV (from IMEC?)?...maybe no worries then...unless it really happens :p

In any case it seems to go with the 2018-2020 timing.

"EUV極紫外光刻技術採用波長10~14納米的極紫外光作為光源,將光刻技術擴展到28納米以下,可有效解決193納米光刻所遇到的瓶頸,有助於廠商縮小晶片面積,簡化工藝。目前多家光刻設備公司正緊鑼密鼓準備量產EUV設備,但生產及營運成本仍然是市場採用的最大挑戰。"

Translation:
"EUV technology uses an extreme ultraviolet wavelength of 10-14 nm as the light source, and is to be applied to 28 nm and below; it can resolve the bottleneck of 193 nm lithography, helping manufacturers reduce chip area, simplify the process. Currently many lithography-related companies are preparing to bring EUV equipment to production, but the production and operating costs remain the biggest challenges to market adoption."
 
Last edited:
imec is a research institute and although has been working with industry partners, the nature of their work is that they never get the chance to look at yield problems. There is a big difference between a device that you can write an IEDM paper on and a yielding technology that you can ship to customers.

The latter is true. For the former I would relativate it a little bit; imec is somewhere between a research organization and a development organization. It's the step of going from a concept shown in academic research to make it mass producible. It's true that we don't have products and thus do no yield ramping on a full process but we have to show the yielding possibility of process steps. Just showing one working device on a wafer and write a paper on it is not enough to fulfill our partner needs. There have been projects where defectivity of a cleaning step or a litho step was optimized. I agree this does not cover all possible interactions between the steps in a full process but doing that is not considered pre-competitive research and thus not for imec to do; but we do have experts in defectivity, integration experts etc. who could provide help in yield ramping. I don't know the specifics of the Qualcomm, imec and SMIC collaboration though.
 
Last edited by a moderator:
Highly unlikely. SMIC specializes in "T like" compatible processes which means they copy intellectual property (GDS, design rules etc...). They were caught doing this at .13m and from what I understand 28nm will also be highly scrutinized.

Without "T like" compatibility it will be very hard for SMIC to continue as a second source foundry outside of China no matter how much money the Chinese government gives them. SMIC is also not great at yield ramping so how long will it take for them to be price competitive with TSMC 28nm which now yields at 99.99%? Probably never.

For 14nm SMIC will have to master both DPT and FinFETs since they skipped 20nm. TSMC really made a smart move doing DPT at 20nm and adding FinFETs at 16nm. 16nm Yield from what I hear is at record levels.

"SMIC also revealed risk production of chips made on its 14nm FinFET process could start as early as 2018"

Making that kind of prediction three years out? 14nm production "could" also never happen at all.

I read SMIC is already making some mid-level processors(28nm) for Quallcom, for the chinese market. Even without great yields, just the support of the Chinese government, strongly encouraging other companies going for the chinese(and maybe western) market to work with them - wouldn't it be enough to guarantee volume (even without being a second source) ?
 
Back
Top