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Hello
I am designing and simulating Self-biasing Vt current reference in 45nm for 4ua current. Schematic is as shown in attached file.
I need to keep transistor NM0, NM1 and PM0 in saturation region but it goes in Sub-threshold region.
also how to select value of resistance.
Parameter VDD=1v, UnCox=225uA/v^2, UpCox=335uA/v^2, Vthn=0.320mv, Vthp=0.285.
Please help me for the design.
Since this is probably a homework problem, maybe you should talk to your professor
Resistance selection will be dominated by your power/current target, which will require you to size the MOS devices to provide enough current to keep them out of subthreshold
