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Renesas prototyping 28nm embedded flash for automotive MCUs

Don Dingee

Moderator
We've been debating the need and ability to scale embedded flash to 28nm and below.

Renesas is working on it, announcing a new implementation of SG-MONOS eFlash moving from 40nm to 28nm. There are more than a few problems involved:

  • Reducing cell size reduces cell current, and overdrive could affect gate oxide reliability at high temp, overcome with negative temp dependence overdrive.
  • High-voltage stress during erase can hurt reliability, so erase speeds are controlled to avoid maximum erase voltages in high erase speeds.
  • High-speed writes of 2.0 MB/sec were achieved with negative back bias and paralleling flash macros.
  • Spread-spectrum clock generation on the drive clock for charge pumps reduces noise.

Random read speeds have been increased to 200 MHz on 4MB chip prototypes at 28nm, for a peak read throughput of 6.4GB/sec.

The initial figures at 28nm suggest almost twice the performance improvement over 40nm, with similar reliability.

It's an interesting development. Renesas often announces forward-looking technology research for MCUs that may be a couple years ahead of actual product.

Press release:

Renesas Electronics Develops 28nm Embedded Flash Memory Technology that Realizes Even Faster Read and Rewrite Speeds for Automotive Microcontrollers
 
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