Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/learn-functional-verification-online-and-free.2177/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021770
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Learn Functional Verification, Online and Free

Daniel Payne

Moderator
Udacity has made a name for itself by offering college-level courses on the web for free. Cadence has just signed up with Udacity to deliver a class on functional verification:

When developing chips it is essential that they get verified thoroughly because it is very hard or impossible to fix them once they have been manufactured. In this class, you will learn how to program verification environments that verify chip functionality efficiently, as well as understand and leverage automation such as constrained random test generation and improve code reuse leveraging a standardized methodology.

What do I need to know?
Programming experience including object-oriented programming. Data & Control structure.

This course is developed by Cadence Design Systems, a global leader in electronic design automation. Cadence® software, hardware, IP, and services help customers around the world to overcome a range of technical and economic hurdles.
What will I learn?
This course will teach you how to think like a verification engineer. It will show the software development aspects you need to know to ensure chips are working as expected. You will learn how to implement verification environments.

Syllabus
Unit 1 - Introduction to Hardware Verification
Understanding the need for verification and language basics

Unit 2 - Verification Concepts
Testing vs. verification; automation and the verification environment

Unit 3 - Basic Verification Environment (Iteration 1)
Simple environment to drive initial traffic into a device

Unit 4 - Functional Coverage
Understanding how thoroughly a system is verified

Unit 5 - Adaptable Verification Environment (Iteration 2)
Enable reuse and flexibility to build an industrial-strength environment

Unit 6 - Data Checking and Scoreboards
How to effectively verify data paths

Unit 7 - Universal Verification Methodology (Iteration 3)
Improving efficiency through standardization

Unit 8 - Debugging
Determining the cause of a bug

Unit 9 - Environment Control and Synchronization
Coordinating components operation in the environment

Unit 10 - Conclusion
What you have learned, next steps, exam

<script src="//platform.linkedin.com/in.js" type="text/javascript"></script>
<script type="IN/Share" data-counter="right"></script>
 
Last edited by a moderator:
Praveen,

Good point, I just visited the site again and noticed at the top it says, "Coming 2013".

Looks like the marketing department got ahead of the training department on announcing this class too early.
 
So, the good news is that you can enroll for the free class, then you just have to wait a few months before the class material becomes available...
 
Back
Top