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I’m curious if there are any memory technologies out there that look likely to make it to the market in the next 5-10 years that could either replace or co-exist with modern DRAM, for applications benefiting from low latency. I know this is a tall order since it’s hard to get new memory tech off the ground (see Optane).
Alternatively, are there any modifications to DRAM (and/or it’s protocols) that might drive latency down substantially?
Some MRAM advertises <10 ns latency which is better than DRAM but their density is much worse, and the cost/bit much higher accordingly. They can effectively compete against SRAM, if the endurance allows. STT-MRAM may not be able to do it, but they are working on SOT-MRAM now.
There are already DRAM products advertised as "low latency". Shorter bit lines can improve latency but this can expand the die size due to more sense amplifiers.
there is no replacement for DRAM. There is low latency DRAM that has been available for years.... there are design options to easily achieve this. but really no one wants it. MOST People want high bandwidth, not low latency. I expect 4F and 3D DRAM to have higher latency with focus on bandwidth. I have a lot of info on challenges of new memories and where the new memories are on the timeline
there is no replacement for DRAM. There is low latency DRAM that has been available for years.... there are design options to easily achieve this. but really no one wants it. MOST People want high bandwidth, not low latency. I expect 4F and 3D DRAM to have higher latency with focus on bandwidth. I have a lot of info on challenges of new memories and where the new memories are on the timeline
Interesting. Is it essentially because PCs (mobile, desktop, and console) are so fully commodity that all development here is focused on what's best for server and infrastructure?
It seems like back end has given up on single/ per thread performance entirely too where this could also help. (Vs bandwidth = throughput).
Interesting. Is it essentially because PCs (mobile, desktop, and console) are so fully commodity that all development here is focused on what's best for server and infrastructure?
It seems like back end has given up on single/ per thread performance entirely too where this could also help. (Vs bandwidth = throughput).
I cant say for sure why. But the history is that latency is getting slower, bandwidth going up, low latency DRAM has been offered multiple times with little response.
I would guess it is because for PC, there is no perceptible improvement on users for low latency.
I am not sure of the performance and latency effect of putting the DRAM on the chip module like mobile does and Lunar lake does. I think B200 has DRAM on board also
I cant say for sure why. But the history is that latency is getting slower, bandwidth going up, low latency DRAM has been offered multiple times with little response.
I would guess it is because for PC, there is no perceptible improvement on users for low latency.
I am not sure of the performance and latency effect of putting the DRAM on the chip module like mobile does and Lunar lake does. I think B200 has DRAM on board also
Gotcha. I'm thinking ahead if SRAM scaling is dead and the primary reason for it is because of main RAM latency, lower latency RAM may gain us some performance when we can't throw more die space at it.
No other emerging memory technologies are even closely comparable to DRAM in overall performance when all aggregate properties of each memory type are collated. Some memory types may show higher performance in specific domains such as in read speed (m-ram) when embedded on the chip. They will however have a significant disadvantage in other factors such as in write speed, and energy, in addition to manufacturing complexity.
I personally perceive that the utilisation of vertical scaling for next generation DRAM, along with more innovative architectures such as integrating memory chips directly on the wafer/die should fulfil any future memory demands for the foreseeable future.
Long time ago, one of my friend told me that one of the strongpoint DRAM has is less cross-talks between manufacturing processes(He called DRAM 'perfect memory'). You can simply fix manufacturing process A, if problem is found in A. But this is not true for other memories. For example, PRAM, it's quite different. They're prone to thermal damage, so change in heat usage in other process may break once well-working storages inside. If you start stacking MRAM storages in a single wafer(3DXP), then hell opens.
I think this is one of the reason why we're simply keep making tiered memories, instead of replacing DRAM. It's quite good option. Dense, fast, durable and easy to understand(and manufacture).
