Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/intel-years-from-success-in-foundry-business-analysts-say-%E2%80%9Cthe-yields-are-just-really-bad-%E2%80%9D-bernstein-research-senior-analyst-stacy-rasgon-told-ee.20777/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021770
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

"Intel Years From Success in Foundry Business, Analysts Say" “The yields are just really bad,” Bernstein Research senior analyst Stacy Rasgon told EE

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Intel’s effort to split off its chipmaking unit as a successful standalone business is likely to take years, according to analysts who spoke to EE Times. The main problem will be making Intel Foundry Services (IFS) cost competitive with larger rival TSMC, they said.

“The yields are just really bad,” Bernstein Research senior analyst Stacy Rasgon told EE Times. He questioned whether Intel would see meaningful shipments of 18A chips by July 2027. Rasgon did not provide estimated numbers on Intel’s yields.

Intel’s first products made with 18A process technology, the destination on the company’s five-nodes-in-four-years roadmap, are coming in 2025, and the company last month released process design kit (PDK) 1.0 to prospective outside customers.

Yet the largest U.S. chipmaker last week said during a financial results announcement that it is cutting 15% of its headcount. Intel will slash 2024 capital expenditures for new fab capacity by more than 20% to a range of $25 billion and $27 billion, reflecting expectations for softer second-half demand.

The IFS operating loss of $2.8 billion in the second quarter this year was worse than the previous quarter. Intel said it expects operating losses at manufacturing unit IFS to continue at approximately the same rate in the third quarter, with more than 85% of wafer volume still coming from pre-EUV nodes with an uncompetitive cost structure. The company counts on its main rival and supplier, TSMC, to provide most of its advanced node chiplets made with EUV lithography.


The company said its ramp of Intel 4 and 3 processes at its Ireland fab, as well as elevated R&D and startup costs to support leading-edge technology development, will also weigh on profitability.

IFS sales to customers outside of parent company Intel remain insignificant, according to Rasgon.

“The initial ramp up is probably mostly packaging,” Rasgon said. “They gave some targets for external revenue. They’re aggressive. We’ve seen effectively nothing yet. They don’t have the processes yet. Especially if the bulk of the interest is going to be on 18A, they haven’t launched it yet.”

IFS cannot compete with larger rivals like TSMC and Samsung on a cost basis, Dylan Patel, chief analyst at SemiAnalysis, told EE Times.

“Eventually Intel can compete if they get more competitive in process technology, but that isn’t until 2026 at minimum in our view,” Patel said.

Intel will continue to rely on TSMC for advanced node silicon, Patel added.

Steady as she goes

Despite the less than positive outlook, Intel CEO Pat Gelsinger is staying on course.

“This is the most significant rebuilding of Intel since the transition from memory to microprocessors four decades ago,” Gelsinger said on an earnings call. “We firmly believe in the IDM 2.0 strategy.”


Intel CEO Pat Gelsinger (right) greets President Joe Biden at Intel’s future manufacturing site in Licking County, Ohio, on Friday, Sept. 9, 2022, as Intel celebrates the start of construction on the company’s newest U.S. manufacturing site. Intel is investing more than $20 billion in the new semiconductor manufacturing site to produce leading-edge chips. (Source:: Intel Corporation)

Intel revamped itself as an integrated device manufacturer (IDM) months after Gelsinger became CEO in 2021, calling for manufacturing expansions while opening more of its capacity for foundry services globally and increasing use of external foundries for some Intel products.

“The IDM 2.0 truck has now driven right into a wall, so to speak, and the company’s grandiose visions increasingly appear at odds with a much more muted reality,” Rasgon said in a report he provided to EE Times.

IFS faces challenges as an independent unit with its own profit-and-loss responsibility, analysts said.

“If Intel’s design side is rational, they will never go to IFS, and IFS will never have the volumes to cover the fixed costs,” Antipodes analyst Zobair Yaqubi told EE Times. “IFS needs to standardize as best it can to TSMC PDK design rules and get to near process parity and run at breakeven cost to get volumes in and build scale.”

CHIPS Act subsidy

Intel earlier this year won an $8.5 billion CHIPS Act subsidy that will be awarded by the Department of Commerce depending on the achievement of milestones aimed at helping rebuild the declining U.S. semiconductor industry.

Intel is building a new $20 billion facility in Ohio as part of its bid to support the CHIPS Act.

“We still believe that we’re comfortably able to execute against those milestones across the projects that we’ve announced,” Gelsinger said on the earnings call. “We are going to benchmark ourselves against world-class foundries, and that’s what Intel Foundry is going to become. That’s uncovered a lot of things, a lot of inefficiencies, a lot of ways that we can drive our capital footprint more effectively.”

Intel is analyzing every aspect of IFS, Gelsinger said. “How we do maintenance, how we procure chemicals, how we run and price wafers and shuttle lots. So, a clean-sheet analysis.”

Intel’s product businesses were not incentivized to make profitable choices in the past, Rasgon pointed out.

The Intel products side of the company has traditionally run “tons of expedites” trying to develop process technology, he added.

“I have to run test wafers, and I want them back very quickly from the factory. If you go to TSMC, they’ll do that for you, but you’ve got to pay for it. It costs a lot of money because it disrupts the fab. [Intel’s] product businesses were just sending tons and tons of expedites through the fabs because they didn’t care. They weren’t bearing the cost. The manufacturing side of the house is bearing the cost.”

Intel said that by 2026, it will cut costs by bringing back more of the business that it outsources to TSMC.

“The huge volume benefits of that really are in ‘26, where we’ll be very aggressive at bringing both the wafers home on a more competitive process with a more competitive product with Panther Lake offsetting the volumes of Lunar Lake, which is almost entirely outsourced,” Gelsinger said, referring to upcoming Intel processors. “We bring tiles (Intel parlance for chiplets) home with a more competitive product and a more competitive process.”

Analysts expressed doubts.

“We keep talking about bringing all these wafers back in-house to help gross margin in 2026, but I also hear about a lot more outsourcing to TSMC,” UBS analyst Timothy Arcuri said on the earnings call.

Intel has built capacity corridors for foundry customers, Gelsinger said.

“Until we have committed orders, we’re going to be modest on how much equipment we put in the [fab] shells and the sites that we have in place,” he replied to Arcuri. “How much of that corridor we keep available, how much flexibility working with our equipment suppliers that we need will be a subject of careful scrutiny as we go forward. The big thing is now that we’re finishing this phase of aggressive buildout.”

 
Stacy is one of my favorite analysts, he says it the way it is. He also has serious creds and knows what he is talking about. Personally I think Intel Foundry is making good progress. Unfortunately expectations are unrealistically high but that is Intel culture. I have not heard about bad 18A yield from reliable sources but I do trust Stacy. Intel is usually very tight lipped with defect density and yield data but when you deal with outside IP companies leaks happen. Also, when you layoff people.

Here's the thing, trust to deliver as advertised is a big deal in the foundry business. At big customers there was a lot of executive pressure to look at IFS but the final decision belongs to the foundry team and if they are wrong it can be very costly. Blame Samsung Foundry for the trust thing. They are hit and miss (Since 28nm) and lately it has been miss. You can also credit TSMC and CC Wei for being such a fierce competitor. Intel really did ruffle TSMC's competitive feathers and now you see the result.

The big mistake Intel made was not hiring someone like Kevin O'Buckley to run IFS sooner, my opinion.
 
Stacy is one of my favorite analysts, he says it the way it is. He also has serious creds and knows what he is talking about. Personally I think Intel Foundry is making good progress. Unfortunately expectations are unrealistically high but that is Intel culture. I have not heard about bad 18A yield from reliable sources but I do trust Stacy. Intel is usually very tight lipped with defect density and yield data but when you deal with outside IP companies leaks happen. Also, when you layoff people.
IP companies are a good point. Intel hasn't laid anyone off yet, and I doubt they will touch manufacturing much, except for the usual performance-based pruning and it'll probably be biased towards G10+ people, if it happens, as usual. Thinking about it, Rasgon must know something he thinks is credible, if he's as good as you say he is, because if he's wrong he's screwed himself with Intel for a long time.
Here's the thing, trust to deliver as advertised is a big deal in the foundry business. At big customers there was a lot of executive pressure to look at IFS but the final decision belongs to the foundry team and if they are wrong it can be very costly. Blame Samsung Foundry for the trust thing. They are hit and miss (Since 28nm) and lately it has been miss. You can also credit TSMC and CC Wei for being such a fierce competitor. Intel really did ruffle TSMC's competitive feathers and now you see the result.

The big mistake Intel made was not hiring someone like Kevin O'Buckley to run IFS sooner, my opinion.
Samsung I get. O'Buckley is still on probation as far as I'm concerned. :)
 
IP companies are a good point. Intel hasn't laid anyone off yet, and I doubt they will touch manufacturing much, except for the usual performance-based pruning and it'll probably be biased towards G10+ people, if it happens, as usual.
I hope so.
Thinking about it, Rasgon must know something he thinks is credible, if he's as good as you say he is, because if he's wrong he's screwed himself with Intel for a long time.

Samsung I get. O'Buckley is still on probation as far as I'm concerned. :)
"I can’t discuss specifics, but Intel showed strong yield data for i7 down through 18A." - SJ
Here's the thing, trust to deliver as advertised is a big deal in the foundry business. At big customers there was a lot of executive pressure to look at IFS but the final decision belongs to the foundry team and if they are wrong it can be very costly. Blame Samsung Foundry for the trust thing. They are hit and miss (Since 28nm) and lately it has been miss. You can also credit TSMC and CC Wei for being such a fierce competitor. Intel really did ruffle TSMC's competitive feathers and now you see the result.
I have never considered the possibility that Samsung might have poisoned the "not TSMC" well and be unintentionally making folks gun-shy to even try throwing many low risk products at intel or maybe one day Rapidus because "not even experienced at foundry Samsung can do the job right". Do UMC and to a lesser extent GF help counteract that negative preconceived notion, or not so much since they only do trailing edge processes?
 
Stacy is one of my favorite analysts, he says it the way it is. He also has serious creds and knows what he is talking about. Personally I think Intel Foundry is making good progress. Unfortunately expectations are unrealistically high but that is Intel culture. I have not heard about bad 18A yield from reliable sources but I do trust Stacy. Intel is usually very tight lipped with defect density and yield data but when you deal with outside IP companies leaks happen. Also, when you layoff people.

Here's the thing, trust to deliver as advertised is a big deal in the foundry business. At big customers there was a lot of executive pressure to look at IFS but the final decision belongs to the foundry team and if they are wrong it can be very costly. Blame Samsung Foundry for the trust thing. They are hit and miss (Since 28nm) and lately it has been miss. You can also credit TSMC and CC Wei for being such a fierce competitor. Intel really did ruffle TSMC's competitive feathers and now you see the result.

The big mistake Intel made was not hiring someone like Kevin O'Buckley to run IFS sooner, my opinion.
Stu Pann did well for himself and joined Groq.

 
stu was retired for about a month lol.

Intel is not staying the course... the customers are forcing them to change course with timing of orders

Pat said intel had yield issues that caused high costs? was he mistaken? apparently intel4 caused increased losses....
 
stu was retired for about a month lol.

Intel is not staying the course... the customers are forcing them to change course with timing of orders

Pat said intel had yield issues that caused high costs? was he mistaken? apparently intel4 caused increased losses....
They were running hot lot on Intel 4 and they misjudged the orders for meteor lake I can't comment on yield issue that ia something Intel and the customer knows
 
Intel's market share is likely to shrink in the coming years, which may slow down its learning curve and make customers more hesitant to bet on Intel.
 
If 18A yield is really that bad then the launch of Panther Lake and Clearwater Forest next year is going to be paper
 
Intel is not staying the course... the customers are forcing them to change course with timing of orders
Other than pausing fab 48 what is intel no longer "staying the course" about. Fab 52 is on time, Fab 38 is supposedly still going, OH and Germany are still going, and intel hasn't canceled the foundry play nor changed process roadmap.
Pat said intel had yield issues that caused high costs? was he mistaken? apparently intel4 caused increased losses....
He never said yield on intel 4 was a problem. The statement was that intel 4 production in Oregon was winding down faster than originally expected and Ireland was ramping faster than expected. Short term Pat said this hurts intel's average wafer costs since Ireland wafer costs are higher there than in Oregon (which of course is because Fab34 is a brand new ramping fab instead of the years old D1 pilot line inside the many years old D1 campus) with the intention of reducing intel's capex by not having to "buy the equipment twice" (once for each of the two fabs). They also mentioned on the call that they are doing this because long term Ireland will have a better cost structure than D1 due to better scale and not using a higher cost/more valuable TD cleanroom as your production base.

Intel also said ramping "AI PC" faster than originally intended by subsiding the cost delta between Meteor/Lunar lake and traditional intel SOCs is significantly hurting their finances. Considering there is advanced packaging raising sort/test/packaging times, the cost of an interposer, the cost of on package DRAM for LNL, and most of the die area (and all of it for LNL) being TSMC silicon; and intel 4 compute die is in all likelihood a relatively small % of the total SOC cost (compared to a traditional CPU where almost all of the cost is the intel manufactured dies).
 
Other than pausing fab 48 what is intel no longer "staying the course" about. Fab 52 is on time, Fab 38 is supposedly still going, OH and Germany are still going, and intel hasn't canceled the foundry play nor changed process roadmap.

He never said yield on intel 4 was a problem. The statement was that intel 4 production in Oregon was winding down faster than originally expected and Ireland was ramping faster than expected. Short term Pat said this hurts intel's average wafer costs since Ireland wafer costs are higher there than in Oregon (which of course is because Fab34 is a brand new ramping fab instead of the years old D1 pilot line inside the many years old D1 campus) with the intention of reducing intel's capex by not having to "buy the equipment twice" (once for each of the two fabs). They also mentioned on the call that they are doing this because long term Ireland will have a better cost structure than D1 due to better scale and not using a higher cost/more valuable TD cleanroom as your production base.

Intel also said ramping "AI PC" faster than originally intended by subsiding the cost delta between Meteor/Lunar lake and traditional intel SOCs is significantly hurting their finances. Considering there is advanced packaging raising sort/test/packaging times, the cost of an interposer, the cost of on package DRAM for LNL, and most of the die area (and all of it for LNL) being TSMC silicon; and intel 4 compute die is in all likelihood a relatively small % of the total SOC cost (compared to a traditional CPU where almost all of the cost is the intel manufactured dies).
so ramping intel4 hurt profitability. your input is that yields are on target despite reports.


given that. when will intel start to benefit from new nodes financially rather than be hurt by new nodes financially?


also if 20a and 18a are positive for intel financially. intel will not slow the ramp of fab52 62, correct?
 
so ramping intel4 hurt profitability. your input is that yields are on target despite reports.
Ramping N3 is hurting TSMC's profitability too. This isn't a new phenomenon. Every company always sees poor per wafer profitability on a ramping node as the wafer costs comes down exponentially with scale and asset depreciation. Nobody who has ever seen defect density curves has ever said intel 4 yield is poor. Just non technical press assuming the Ireland thing means yields are poor without thinking about why the cost would be higher in Ireland and lower in Oregon. Or that if defect densities were high, then Oregon would also have an equally poor cost structure. People who have actually seen the data like Scotten at Ann's NDA only presentation at IFS-DC described yield as "strong". This is consistent with intel's claim that intel 4 process health back in September 2023 was better than 2nd generation 14nm and even 3rd generation 10nm (10nm SF) were back at the Skylake/Tigerlake launches.
given that. when will intel start to benefit from new nodes financially rather than be hurt by new nodes financially?
Technically never. A new fab can only generate fat margins once it is ramped up. The key is having a strong base of established nodes whose profitability covers the ramp costs of the next new thing (hence why intel says profitability for IF will look dire until seeing rapid improvement going into 2026/27). See for example TSMC where new nodes ramps only hurt the profitability by a few % during process ramp because TSMC has a very large volume of lagging nodes on fully deprecated equipment generating huge profit margins and a large volume of established nodes that aren't ramping but still have deprecating equipment generating good margins.
also if 20a and 18a are positive for intel financially. intel will not slow the ramp of fab52 62, correct?
Ramp rate depends entirely on product demand/how many wafers are needed to meet that demand (ie smaller die products will need fewer wafers to hit a given volume commitment and slow the ramp rate). Intel foundry (or any fab operator for that matter) would never want to ramp a node slowly as that means spending more time in the high wafer cost regime and getting a slower ROIC on those tens of billions in R&D and multi-billion dollar fab shells.
 
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Ramping N3 is hurting TSMC's profitability too. This isn't a new phenomenon. Every company always sees poor per wafer profitability on a ramping node as the wafer costs comes down exponentially with scale and asset depreciation. Nobody who has ever seen defect density curves has ever said intel 4 yield is poor. Just non technical press assuming the Ireland thing means yields are poor without thinking about why the cost would be higher in Ireland and lower in Oregon. Or that if defect densities were high, then Oregon would also have an equally poor cost structure. People who have actually seen the data like Scotten at Ann's NDA only presentation at IFS-DC described yield as "strong". This is consistent with intel's claim that intel 4 process health back in September 2023 was better than 2nd generation 14nm and even 3rd generation 10nm (10nm SF) were back at the Skylake/Tigerlake launches.

Technically never. A new fab can only generate fat margins once it is ramped up. The key is having a strong base of established nodes whose profitability covers the ramp costs of the next new thing (hence why intel says profitability for IF will look dire until seeing rapid improvement going into 2026/27). See for example TSMC where new nodes ramps only hurt the profitability by a few % during process ramp because TSMC has a very large volume of lagging nodes on fully deprecated equipment generating huge profit margins and a large volume of established nodes that aren't ramping but still have deprecating equipment generating good margins.

Ramp rate depends entirely on product demand/how many wafers are needed to meet that demand (ie smaller die products will need fewer wafers to hit a given volume commitment and slow the ramp rate). Intel foundry (or any fab operator for that matter) would never want to ramp a node slowly as that means spending more time in the high wafer cost regime and getting a slower ROIC on those tens of billions in R&D and multi-billion dollar fab shells.
Some inputs:
1) Claimed by tsmc, it will typically take 6-8 quarters for new nodes to achieve corporate average GM.
2) If we considered nodes passed 5 years depreciation as old nodes, then 7nm node (launched at 2018) was just past that now. Revenue from nodes below 7nm counts 50%
(tsmc 2024Q2 presentation). I think it is not so strong base to cover huge ramp cost.
3) As we know, mobile phone AP seems to be small die comparing with HPC chips. Mobile phone counts 33% and HPC counts 52% of tsmc Q224 revenue. I believe most of HPC revenue will be from 4/5nm or 7nm nodes.
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Some inputs:
1) Claimed by tsmc, it will typically take 6-8 quarters for new nodes to achieve corporate average GM.
I don't doubt that. However you don't need any inside information to tell you that less than 40M (assuming intel's AI PC projections include some amount of LNL) 40-70mm2 MTL dies are not driving the same wafer demand/ramp rate of a 113mm2 A17pro, 169mm2 M4, or 146mm2 tigerlake (what outsider looking in seems to maybe be the most successful product in intel's 50+ year history).
2) If we considered nodes passed 5 years depreciation as old nodes, then 7nm node (launched at 2018) was just past that now. Revenue from nodes below 7nm counts 50%
(tsmc 2024Q2 presentation). I think it is not so strong base to cover huge ramp cost.
3) As we know, mobile phone AP seems to be small die comparing with HPC chips. Mobile phone counts 33% and HPC counts 52% of tsmc Q224 revenue. I believe most of HPC revenue will be from 4/5nm or 7nm nodes.
Revenue share doesn't necessarily equal profit share, and the trailing edge (which in 2024 feels like would be 7nm and above is in a bad place right now industry wide). Given the hotness of HPC, the weakness of mobile, and the weakness in trailing edge semis I don't know if the current numbers are representative of what TSMC will necessarily look like in the next few years.
 
Ireland is also fabbing 578mm2 Sierra Forest dies those are not small at all also Stacy without any data and Scotten with Nda data the difference is clear who to believe you can't share NDA details but you can share public Info in NDA
 
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https://www.techpowerup.com/325157/...es-company-running-hot-lots-to-satisfy-demand Aug 2nd, 2024

In a conversation with Intel's CEO Pat Gelsinger, industry analyst Patrick Moorhead revealed that Intel's Meteor Lake CPU platform suffers from some production issues. More specifically, Intel has been facing some yield and/or back-end production issues with its Meteor Lake platform, resulting in a negative impact on Intel's margins when producing the chip. The market is showing great demand for these chips, and Intel has been forced to run productions of "hot lots"-- batch production of silicon with the highest priority that gets moved to the front of the production line so they can get packaged as fast as possible. While this is a good sign that the demand is there, running hot lots increases production costs overall as some other wafers have to go back so Meteor Lake can pass.

The yield issues associated with Meteor Lake could be stemming from the only tile made by Intel in the MTL package: the compute tile made on the Intel 4 process. Intel 4 process is specific to Meteor Lake. No other Intel product uses it, not even the Xeon 6, which uses Intel 3, or any of the upcoming CPUs like Arrow Lake, which uses the Intel 20A node. So, Intel is doing multiple nodes for multiple generations of processors, further driving up costs as typical high-volume production with a single node for multiple processors yields lower costs. Additionally, the company is left with lots of "wafers to burn" with Intel 4 node, so even with Meteor Lake having yield issues, the production is ultimately fine, while the operating costs and margins take a hit.
 
IMHO I think the conflict we have here is people giving reasons WHY Intel is doing poor financially and getting worse (despite documented Intel statements made in the past about improvement) VS the observable fact that Intel is is doing poor financially and will be doing poorly for the next several years.

I predicted that Intel would do poorly in 2024 back in 2021 for the obvious reasons why (I have excel) and that Intel would not ramp foundry as committed for the obvious reasons why. Investor are not interested in the why anymore and have lost patience (Its been 3.5 years of obvious decline and excessive corporate spending). Hence stock price is hideously low.

Now we just need Intel to SHOW ACTUAL improvement.

Right now, my prediction for end of the year is a statement from the CEO of Intel
"we did not hit our goals for product launches and financials due to changes in the macro, the election, layoffs, restructuring, reorgs, new processes that could not be foreseen"

Just an opinion, its time to focus on WHAT the numbers say and not the most updated reason WHY the numbers are poor.
 
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