Intel Manufacturing Business Suffers Setback as Broadcom 18A Tests Disappoint

[kevin01]

"One of the benefits of our early success on Intel 18A is that it enables us to shift engineering resources from Intel 20A earlier than expected as we near completion of our five-nodes-in-four-years plan. With this decision, the Arrow Lake processor family will be built primarily using external partners and packaged by Intel Foundry."

It's an interesting statement. On one hand Intel is proudly announcing the major progress of Intel 18A. On the other hand, Intel is announcing Arrow Lake desktop processor family will be produced by TSMC, not by the Intel 20A as originally planned.

And Intel said it helps 18A's to move forward faster. Yet Intel CFO just stated today that 18A/Intel Foundry won't see meaningful revenue until 2027!

Who is using Intel 20A anyway?

Is Intel moving to the fab-lite business model?

To be fair, I re-read intel presentation in April. They did say "we'll see a good amount of Intel 3 in 2025, a small amount of 18A wafers. We'll see a good amount of 18A wafers in 2026." and also external volume will come several quarters later than internal volume. So it is not surprising that cfo said today regarding external 18A customers

18A/Intel Foundry won't see meaningful revenue until 2027!

 

[MKWVentures]

I don't know why intel phrased things the way they did? Intel has never once hid that ARL was not all 20A. Also just logically the choice for the primary process would have needed to have been made in 2019-2020; you know before 5N4Y or even Pat. If 20A was the primary, even if 20A regressed to 10k DD and only 10% of the total performance entitlement then intel couldn't just magically flex 10s of millions of units back to TSMC unless the capacity was bought. And inversely even if 20A was the best thing since sliced bread they are stuck with N3. I've said this over a year ago now, but I will say it again as it applies to intel products just as much as it applies to external. Even if intel was 10 years ahead of TSMC things like intel 4-18A would not be magically used by everyone right away because the volumes and design work were already committed to TSMC years ago. Intel claims that product decisions have been made to gradually move volume back internal. So even if intel is lying, 18A is worse than 10nm, and 18A isn't even PPA competitive with N3; if a product and % of the volume was committed to 18A it is stuck there unless intel wants to spend 3-4 years porting it and can find some spare TSMC capacity without putting down the pre-pay for guaranteed capacity.

Image credit 2022
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Also I don't know why folks read this and say 20A ARL will not launch. The wording "primarily" is pretty cut and dry that it will exist in some lower volume skus. Considering intel thinks MTL/LNL/ARL are not cost competitive and that they think PNL will be better in this respect. Not necessarily the worst thing that the pipe-cleaner for PNL is not wasting capacity on a DOA chip (as LNL just looks better in every way that isn't cost) that is also not cost effective.

WOW, I knew someone would spin this as "planned all along" and "a good thing showing Intel is even further ahead"

Arrow Lake was supposed to be 20A. Pat said that multiple times. Everyone thought that. The might have a "Cannon Lake" incident with <100K units sold on some sku. That will put 20A in the same category as the Original Intel 10nm.

In 2025 Intel will have less than 1 full fabs worth of wafers running a technology less than Intel 7 (combined 4,3,20A,18A).

 

[fansink]

WOW, I knew someone would spin this as "planned all along" and "a good thing showing Intel is even further ahead"

Arrow Lake was supposed to be 20A. Pat said that multiple times. Everyone thought that. The might have a "Cannon Lake" incident with <100K units sold on some sku. That will put 20A in the same category as the Original Intel 10nm.

In 2025 Intel will have less than 1 full fabs worth of wafers running a technology less than Intel 7 (combined 4,3,20A,18A).

Awesome, yet sad perspective, doesn't bode well for the advisory board's "solution space", just a couple weeks from now.

As with all musical chairs, there's likely to be a lot of inconvenient truths, finger pointing, tears, and lawsuits, before it's over.

 

[Artificer60]

'Planned all along', no. But I do belive that it is a cost saving move rather than a failure of 20A. 20A does not have a long list of products being built on it and I believe it was always kind on a node intended to transition to EUV. That being the case, why spend the money to ramp it when you can just move on to 18A less than a year later?

 

[hist78]

Awesome, yet sad perspective, doesn't bode well for the advisory board's "solution space", just a couple weeks from now.

As with all musical chairs, there's likely to be a lot of inconvenient truths, finger pointing, tears, and lawsuits, before it's over.

I don't know why intel phrased things the way they did? Intel has never once hid that ARL was not all 20A. Also just logically the choice for the primary process would have needed to have been made in 2019-2020; you know before 5N4Y or even Pat. If 20A was the primary, even if 20A regressed to 10k DD and only 10% of the total performance entitlement then intel couldn't just magically flex 10s of millions of units back to TSMC unless the capacity was bought. And inversely even if 20A was the best thing since sliced bread they are stuck with N3. I've said this over a year ago now, but I will say it again as it applies to intel products just as much as it applies to external. Even if intel was 10 years ahead of TSMC things like intel 4-18A would not be magically used by everyone right away because the volumes and design work were already committed to TSMC years ago. Intel claims that product decisions have been made to gradually move volume back internal. So even if intel is lying, 18A is worse than 10nm, and 18A isn't even PPA competitive with N3; if a product and % of the volume was committed to 18A it is stuck there unless intel wants to spend 3-4 years porting it and can find some spare TSMC capacity without putting down the pre-pay for guaranteed capacity.

Image credit 2022
View attachment 2244

Also I don't know why folks read this and say 20A ARL will not launch. The wording "primarily" is pretty cut and dry that it will exist in some lower volume skus. Considering intel thinks MTL/LNL/ARL are not cost competitive and that they think PNL will be better in this respect. Not necessarily the worst thing that the pipe-cleaner for PNL is not wasting capacity on a DOA chip (as LNL just looks better in every way that isn't cost) that is also not cost effective.

I'd like to know the true reasons or causes behind the shift from Intel 20A to TSMC N3. Is it due to yield, quality, capacity, cost, profit, product performance, CapEx constraints, delivery timeline, Intel PDK vs. TSMC PDK, customer demand, or something else?

 

[nghanayem]

I'd like to know the true reasons or causes behind the shift from Intel 20A to TSMC N3. Is it due to yield, quality, capacity, cost, profit, product performance, CapEx constraints, delivery timeline, Intel PDK vs. TSMC PDK, customer demand, or something else?

 

[kevin01]

WOW, I knew someone would spin this as "planned all along" and "a good thing showing Intel is even further ahead"

Arrow Lake was supposed to be 20A. Pat said that multiple times. Everyone thought that. The might have a "Cannon Lake" incident with <100K units sold on some sku. That will put 20A in the same category as the Original Intel 10nm.

In 2025 Intel will have less than 1 full fabs worth of wafers running a technology less than Intel 7 (combined 4,3,20A,18A).

I'd like to know the true reasons or causes behind the shift from Intel 20A to TSMC N3. Is it due to yield, quality, capacity, cost, profit, product performance, CapEx constraints, delivery timeline, Intel PDK vs. TSMC PDK, customer demand, or something else?

I'd like to know the true reasons or causes behind the shift from Intel 20A to TSMC N3. Is it due to yield, quality, capacity, cost, profit, product performance, CapEx constraints, delivery timeline, Intel PDK vs. TSMC PDK, customer demand, or something else?

As an $intc investor who has followed its recent developments pretty closely, I was aware (since early 2024) that most ARL SKUs were supposed to be made on TSMC N3, but lower end ARL were supposed to be on 20A. This was probably because lower end ARL has smaller die sizes, and therefore 20A could yield well for these chips.

I also believe that they made the decision of primarily using N3 for ARL quite a long time ago, as someone pointed out, the design time and the lead time to secure TSMC capacity are quite long.

Now, why they decide not to pursue 20A at all? I tend to believe this was a business decision, for two reasons:
1) their CFO mentioned a saving of some $500M yesterday at Citi conference. If it was true, we are talking about quite significant amount of money.
2) Pat Gelsinger mentioned that panther lake will start production before the end of 2024. A few months ago, they were saying PTL production in 2025. So I believe that 18A progress indeed gives them more confidence now.

That being said, expect Intel uses TSMC quite extensively in 2025 and even in 2026, as they said in April 2024:

So it's on the order of 30-ish percent of our wafers today that we bring in externally. We'll be in-sourcing some level. As I said, a couple of fab modules, we expect over this period of time. So we expect that to moderate to down below 20% over the period even as we continue to use.

 

[Daniel Nenni]

"While in our view Intel manufacturing for CPUs is on track, we continue to believe it should exit the foundry business in the best interest of shareholders," Citi analyst Christopher Danely said in a note to clients. Danely has a Neutral rating and $25 price target on Intel.

Speaking at Citi's tech conference on Wednesday, Intel CFO David Zinsner said that the company is skipping its 20A manufacturing technology in favor of the more advanced 18A manufacturing process. Danely said this will save Intel another $500M in costs (Intel recently announced $10B in capex spending cuts and $4B in operating cost cuts), but it is still way behind industry leader Taiwan Semiconductor, which builds chips for companies like Nvidia, Apple, AMD and others.

"We continue to expect Intel to reach manufacturing parity with TSMC during 1H25 for client CPUs, while management acknowledged that parity in the data center market may take a little longer," Danely opined.

Zinsner said at the conference that it should see "meaningful" foundry revenue next year from its advanced packaging services, though it will not be until 2027 until it sees "meaningful" foundry wafer revenue. As such, the foundry business should dilute the company's margins next year, Danely opined.

 

[Maximus]

'Planned all along', no. But I do belive that it is a cost saving move rather than a failure of 20A. 20A does not have a long list of products being built on it and I believe it was always kind on a node intended to transition to EUV. That being the case, why spend the money to ramp it when you can just move on to 18A less than a year later?

I'm also thinking about cost. When Pat announced the 5 nodes in 4 years plan, I had concerns about its cost-effectiveness since only one or two major Intel products were slated for each node. Pat likely anticipated bringing in external customers for Intel 3 and Intel 18A to offset costs. Even without external customers, Intel could afford this when they had healthy profits.

But now, with no major external IFS customers and declining sales of Intel's own products, Intel has to cut costs wherever possible.

As Intel's financial situation worsens, they may be forced to outsource more production to TSMC. However, this increasing reliance on TSMC could distance Intel further from its IDM 2.0 vision.

 

[MKWVentures]

Panther lake ES samples are just going out now. I takes a year from ES samples to qual a product. Clearwater forest is even slower. It would seem physically impossible to run a risk production wafer in 2024. And there are accounting rules that deal with this as well (which are legal requirements).

Roadmap changes might make Intel 3 more important than people thought.

And yes this was all predictable and predicted in 2021. Sad

 

[Xebec]

Panther lake ES samples are just going out now. I takes a year from ES samples to qual a product. Clearwater forest is even slower. It would seem physically impossible to run a risk production wafer in 2024. And there are accounting rules that deal with this as well (which are legal requirements).

Roadmap changes might make Intel 3 more important than people thought.

And yes this was all predictable and predicted in 2021. Sad

Any insight what Arrow Lake refresh is going to be in Q4 2025? (i.e. just another small revision on TSMC N3 or something else?)

 

[MKWVentures]

Any insight what Arrow Lake refresh is going to be in Q4 2025? (i.e. just another small revision on TSMC N3 or something else?)

lots of rumors, Intel doesnt seem to know for sure as of today. Keep in mind: the key to cost reduction is limiting 20A/18A ramp in 2025 and maximizing ramp of Intel 3 and Intel 4. And TSMC has apparently delivered very well with N3.

 

[hist78]

lots of rumors, Intel doesnt seem to know for sure as of today. Keep in mind: the key to cost reduction is limiting 20A/18A ramp in 2025 and maximizing ramp of Intel 3 and Intel 4. And TSMC has apparently delivered very well with N3.

Complicate the situation is that Chips Act money has milestones and deliverables requirements. The taxpayers' money won't come or won't come in full amount if Intel can't meet those requirements. I think Intel is (or going to) negotiating with US government again.

 

[Artificer60]

lots of rumors, Intel doesnt seem to know for sure as of today. Keep in mind: the key to cost reduction is limiting 20A/18A ramp in 2025 and maximizing ramp of Intel 3 and Intel 4. And TSMC has apparently delivered very well with N3.

I have to disagree with your basic assumption here. Ramping 18A will.be expensive, but less expensive than continuing to manufacture on intel 3/4. Intel has already indicated that intel 20A/18A are going to be their first cost effective nodes due to the use of EUV. I don't believe they can afford not to move away from intel 3/4 since Intel admits those are losing money.

 

[SemiFunctional]

I have to disagree with your basic assumption here. Ramping 18A will.be expensive, but less expensive than continuing to manufacture on intel 3/4. Intel has already indicated that intel 20A/18A are going to be their first cost effective nodes due to the use of EUV. I don't believe they can afford not to move away from intel 3/4 since Intel admits those are losing money.

Intel 4 &3 use EUV. What's not cost effective is that nobody is buying intel 4 & 3.

 

[MKWVentures]

I have to disagree with your basic assumption here. Ramping 18A will.be expensive, but less expensive than continuing to manufacture on intel 3/4. Intel has already indicated that intel 20A/18A are going to be their first cost effective nodes due to the use of EUV. I don't believe they can afford not to move away from intel 3/4 since Intel admits those are losing money.

The issues is building and tooling and ramping a 20A/18A fab. it will bleed money. So they are going to change the ramp. A full 3 or 4 fab is much more cost effective than a 70% full 18A fab

 

[tooLongInEDA]

Reviewing some of these Intel announcements about where it is fabbing its latest products, I get the distsinct sense that TSMC usage is still increasing. And that designs are migrating from Intel foundry plan to TSMC fab.

Perhaps there's not enough data - or enough reliable data - to plot the TSMC usage curve by Intel. But you've got to wonder if the rate of defection to TSMC is actually slowing down yet and an inflection point is on the cards. Because there has to be some risk that the TSMC volume, momentum and design group inertia (reluctance to switch fab - ar rather, switch again) start to become factors. Switching always has some cost and risk alongside any benefits.

It's also worth remembering - given Pat Gelsinger's recent acknowledgement that Intel has under-estimated the importance of EDA and IP foundry ecosystems - that every new Intel design with TSMC both reinforces the TSMC ecosystem and delays the scaling up of Intel's foundry ecosystem (for both its own and customer designs).

 

[lefty]

I don't think people read Intel's statement correctly:

With this decision, the Arrow Lake processor family will be built primarily using external partners and packaged by Intel Foundry.

It says primarily using external partners. It doesn't say they are no 20A Arrow lake CPU tiles. Officially Intel said that all CPU Arrow lake tiles are on 20A - therefore they had to correct this statement and now they say most Arrow lake CPU tiles are TSMC. In other words, nothing has changed - one or two SKUs will have 20A and the rest will be TSMC N3.

 

[MKWVentures]

TSMC re

Reviewing some of these Intel announcements about where it is fabbing its latest products, I get the distsinct sense that TSMC usage is still increasing. And that designs are migrating from Intel foundry plan to TSMC fab.

Perhaps there's not enough data - or enough reliable data - to plot the TSMC usage curve by Intel. But you've got to wonder if the rate of defection to TSMC is actually slowing down yet and an inflection point is on the cards. Because there has to be some risk that the TSMC volume, momentum and design group inertia (reluctance to switch fab - ar rather, switch again) start to become factors. Switching always has some cost and risk alongside any benefits.

It's also worth remembering - given Pat Gelsinger's recent acknowledgement that Intel has under-estimated the importance of EDA and IP foundry ecosystems - that every new Intel design with TSMC both reinforces the TSMC ecosystem and delays the scaling up of Intel's foundry ecosystem (for both its own and customer designs).

TSMC revenue from Intel will increase in 2025 and most likely be level in 2026. If Intel internal products take off, they will qualify in 2H 2025 and ramp slowly in 2026

 

[Xebec]

An apparent update from Reuters (found on https://x.com/Mojo_flyin/status/1832055416345579629)

“Both Intel and Broadcom responded to Reuters request for comment. Broadcom shared that it has been testing Intel’s foundry Services’ products, and these tests remain ongoing with no final conclusions having been reached.”

“Intel stressed that 18A remains on track for high-volume production in 2025”.