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Intel has some Arrow Lake on "Intel 3"?

X

Xebec

Well-known member
I just noticed the Intel ARK sheet for Core Ultra 7 265U says the lithography is "Intel 3" :

1739021403665.png


Intel® Core™ Ultra 7 Processor 255U (12M Cache, up to 5.20 GHz) - Product Specifications | Intel

Intel® Core™ Ultra 7 Processor 255U (12M Cache, up to 5.20 GHz) quick reference with specifications, features, and technologies.
www.intel.com www.intel.com

Which compares to the 285K saying "TSMC N3B":

Intel® Core™ Ultra 9 Processor 285K (36M Cache, up to 5.70 GHz) - Product Specifications | Intel

Intel® Core™ Ultra 9 Processor 285K (36M Cache, up to 5.70 GHz) quick reference with specifications, features, and technologies.
www.intel.com www.intel.com

(Also: 110C max for Intel 3 vs 105C for N3B, The Intel 3 die is a 2+8 core style vs up to 8+16 for N3B)
..

At one point there were indications that Arrow Lake would have some chips on 20A.. but it looks like instead of using TSMC for all of Arrow Lake, they are using Intel 3.
 
Xebec said:
I just noticed the Intel ARK sheet for Core Ultra 7 265U says the lithography is "Intel 3" :

View attachment 2778

Intel® Core™ Ultra 7 Processor 255U (12M Cache, up to 5.20 GHz) - Product Specifications | Intel

Intel® Core™ Ultra 7 Processor 255U (12M Cache, up to 5.20 GHz) quick reference with specifications, features, and technologies.
www.intel.com www.intel.com

Which compares to the 285K saying "TSMC N3B":

Intel® Core™ Ultra 9 Processor 285K (36M Cache, up to 5.70 GHz) - Product Specifications | Intel

Intel® Core™ Ultra 9 Processor 285K (36M Cache, up to 5.70 GHz) quick reference with specifications, features, and technologies.
www.intel.com www.intel.com

(Also: 110C max for Intel 3 vs 105C for N3B, The Intel 3 die is a 2+8 core style vs up to 8+16 for N3B)
..

At one point there were indications that Arrow Lake would have some chips on 20A.. but it looks like instead of using TSMC for all of Arrow Lake, they are using Intel 3.
Click to expand...
Intel launched talked about this chip and it's Redwoodcove and Crestmont-nes at CES. If you go deeper in the spec sheet you would see everything but the frequency matches meteorlake-U. But now using a newer process vintage (in this case base Intel 3).

There are two main things OEMs use the U segment parts for. Premium ultra portables use U series as they are the lowest power CPUs, and more budget laptops like the cheaper smaller die size U series parts. Lower power also means you can put a smaller battery and a cheaper cooling solution. Lunar lake would smoke any arrow lake U in the low power department since it is a mobile first chip rather than a design compromised by desktop and performance at all costs sensibilities. So that just leaves the more budget use case. LNL is an expensive part and Intel is already selling it in a more broad capacity than originally intended this hurting profitablity (see their earlier comments from late 2023 or early 2024 as they shifted focus or even how Intel changed the flagship roadmap item from ARL to LNL). So unless Intel wanted to sell LNL for even less money something was needed to bridge the cost gap between RPL-U and LNL-V. Intel 3 should be cheaper to make than buying N3 (on account of Intel making narrow margins on Intel 7 and claiming that Intel 3 GM is improved) plus it helps fill up Ireland/reduce their wafer costs. Doesn't hurt that it should be a drop in addition for last year's laptops. I would assume this is the logic CCG used to call Intel 3 MTL the better product for 200U in an environment where LNL is the main premium 200 series offering.
 
nghanayem said:
Intel launched talked about this chip and it's Redwoodcove and Crestmont-nes at CES. If you go deeper in the spec sheet you would see everything but the frequency matches meteorlake-U. But now using a newer process vintage (in this case base Intel 3).

There are two main things OEMs use the U segment parts for. Premium ultra portables use U series as they are the lowest power CPUs, and more budget laptops like the cheaper smaller die size U series parts. Lower power also means you can put a smaller battery and a cheaper cooling solution. Lunar lake would smoke any arrow lake U in the low power department since it is a mobile first chip rather than a design compromised by desktop and performance at all costs sensibilities. So that just leaves the more budget use case. LNL is an expensive part and Intel is already selling it in a more broad capacity than originally intended this hurting profitablity (see their earlier comments from late 2023 or early 2024 as they shifted focus or even how Intel changed the flagship roadmap item from ARL to LNL)
Click to expand...
Good input thanks! I had heard that there would be some blurring on roadmap with reuse of cores.... but i didnt get it. So will they move Arrow lake cores to Intel 3 ever? @siliconbruh999 @nghanayem
 
MKWVentures said:
Good input thanks! I had heard that there would be some blurring on roadmap with reuse of cores.... but i didnt get it. So will they move Arrow lake cores to Intel 3 ever? @siliconbruh999 @nghanayem
Click to expand...
I'm not an expert here, but porting Redwood Cove and Crestmont from Intel 4 to Intel 3 was logical compared to porting Lion Cove and Skymont from TSMC N3B to Intel 3. Who knows what Intel's "refresh" roadmap looks like, though.. the Arrow Lake-ish processor lineage could live on for a lonngggg time while Panther Lake and Nova Lake ramp throughout 2026. That being said, at that point N3B will no longer be the bleeding edge and so will be considered "cheap" compared to 18A or N2, so why not just stay there if you already have wafer agreements to fulfill...
 
MKWVentures said:
Good input thanks! I had heard that there would be some blurring on roadmap with reuse of cores.... but i didnt get it. So will they move Arrow lake cores to Intel 3 ever? @siliconbruh999 @nghanayem
Click to expand...
Moving Meteor lake to Intel 3 would have required almost no work as Intel 3 is Intel 4 with more performance and an optional higher density logic cell using fewer fins. Maybe a couple layers here or there might need a new mask. If you told me they didn't even need an all layer stepping I would not for even a moment doubt it. Moving brand new IPs from a completely different node would take a fairly substantial design team years of work (like 2028 timeframe). Considering ARL Mobile was obsolete before it even launched ARL on a worse node would not be desirable versus NVL-next-next.
Brady said:
I'm not an expert here, but porting Redwood Cove and Crestmont from Intel 4 to Intel 3 was logical compared to porting Lion Cove and Skymont from TSMC N3B to Intel 3. Who knows what Intel's "refresh" roadmap looks like, though.. the Arrow Lake-ish processor lineage could live on for a lonngggg time while Panther Lake and Nova Lake ramp throughout 2026. That being said, at that point N3B will no longer be the bleeding edge and so will be considered "cheap" compared to 18A or N2, so why not just stay there if you already have wafer agreements to fulfill...
Click to expand...
A fairly significant part of the cost adder over say RPL-U is just how stupid large the die sizes are, the base die, the much longer test times (bumping, sort, and testing for each die and for the final package), and the assembly/packaging costs. Also even if N3 prices go down over time "N3B" yield enhancement won't get much attention since TSMC's focus is on N3E and descendents which would need a whole redesign to swap to from "N3B". Also even as prices go down they will never go below Intel 7 cost or price. So either way you slice it my educated opinion is that MTL/ARL and LNL will never really be truly suitable for the mainstream market.

In a world were Intel products has to pay a premium for things they used to get at cost, I think a mainstream U CPU is a mostly monolithic 2P, 4LPE cores, 2-4 Xe cores, IMC, and small NPU (maybe not even copilot plus capabile if Intel can get away with that) with a PCH on a 1 generation old process for wifi, USB, etc. As an alternative maybe move the NPU to this die as well. Also definitely reuse this die for 2 generations. All linked up with ideally organic packaging or if you must just EMIB.

Towards the end of Pat's tenure he mentioned that products was starting to use the new accounting model to design products in a cost effective rather than performance at all costs mentality. If that is true we won't fully see the results until 2029 (plus or minus a year). I wonder if we will see design divergence (where all the fancy stuff costs a lot and the cheaper stuff looks almost unrecognizable at a product level); or convergence (like tiger lake and prior where you got like 1 desktop and 1 or 2 mobile dies that are basically all remixes of each other)?
 
nghanayem said:
Towards the end of Pat's tenure he mentioned that products was starting to use the new accounting model to design products in a cost effective rather than performance at all costs mentality. If that is true we won't fully see the results until 2029 (plus or minus a year). I wonder if we will see design divergence (where all the fancy stuff costs a lot and the cheaper stuff looks almost unrecognizable at a product level); or convergence (like tiger lake and prior where you got like 1 desktop and 1 or 2 mobile dies that are basically all remixes of each other)?
Click to expand...
Thanks great input

"Towards the end of Pat's tenure he mentioned that products was starting to use the new accounting model to design products in a cost effective rather than performance at all costs mentality."

I am glad Intel started looking at that last year :ROFLMAO::LOL::ROFLMAO::LOL:
 
MKWVentures said:
Good input thanks! I had heard that there would be some blurring on roadmap with reuse of cores.... but i didnt get it. So will they move Arrow lake cores to Intel 3 ever? @siliconbruh999 @nghanayem
Click to expand...
I have no real insight into how hard or easy to port Lion Cove and Skymont cores from ARL-S to Intel 3 but I remember seeing this slide on Lion Cove arch deep dive during Computex 2024 for LNL launch. Lion Cove is 99% process-node-agnostic. Not entirely sure what I think it means (ease of portability between process nodes)! Just thought of sharing.

1739073536336.png
 
dkr1986 said:
I have no real insight into how hard or easy to port Lion Cove and Skymont cores from ARL-S to Intel 3 but I remember seeing this slide on Lion Cove arch deep dive during Computex 2024 for LNL launch. Lion Cove is 99% process-node-agnostic. Not entirely sure what I think it means (ease of portability between process nodes)! Just thought of sharing.

View attachment 2780
Click to expand...
You have to do many things to port from node A to node B on same foundry let alone two different foundrys if your design uses DTCO even more so
 
Back in the days when Intel were using their own fabs they could just get fab guys to tweak the node to get them a ++ version and then release that as a refresh. But TSMC N3B is not design rule compatible with N3E, and I guess getting a N3B++ node is out of the question.
The other thing is the Arrow lake refresh has been on and off the table several times. Originally it was just regular Arrow Lake with a bigger NPU.
 
lefty said:
Back in the days when Intel were using their own fabs they could just get fab guys to tweak the node to get them a ++ version and then release that as a refresh. But TSMC N3B is not design rule compatible with N3E, and I guess getting a N3B++ node is out of the question.
The other thing is the Arrow lake refresh has been on and off the table several times. Originally it was just regular Arrow Lake with a bigger NPU.
Click to expand...

It's interesting Intel is still trying to keep up an annual cadence while AMD largely stopped that and went to 2 years. I understand OEMs were often asking for annual so they could sell more product.

(Though AMD still does stagger products - 2 years between Zen 3, 4, 5, but with some APU launches inbetween).

I guess the financial math still supports even mediocre annual updates..
 
Xebec said:
It's interesting Intel is still trying to keep up an annual cadence while AMD largely stopped that and went to 2 years. I understand OEMs were often asking for annual so they could sell more product.

(Though AMD still does stagger products - 2 years between Zen 3, 4, 5, but with some APU launches inbetween).

I guess the financial math still supports even mediocre annual updates..
Click to expand...
Cause marketing works OEMs want a new gen for selling in name
 
Xebec said:
It's interesting Intel is still trying to keep up an annual cadence while AMD largely stopped that and went to 2 years. I understand OEMs were often asking for annual so they could sell more product.

(Though AMD still does stagger products - 2 years between Zen 3, 4, 5, but with some APU launches inbetween).

I guess the financial math still supports even mediocre annual updates..
Click to expand...
I make it 5x generations (Zen1 to Zen5) from March 2017 to Aug 2024. (~7.5 years), but what massive cadences.

I think you flatter Intel to credit them with anything like that cadence, even in their glory days. Its in the nature of monopolies to do the minimum, and in the benefits of chiplets, to achieve such rapid, unblemished and productive cadence.

It has been a great saga.

Compartmentalising functions over multiple processors, means there is often little to be gained from fraught and time consuming remasking & revalidating all chiplets for the latest (expensive) node.
 
libranskeptic said:
I make it 5x generations (Zen1 to Zen5) from March 2017 to Aug 2024. (~7.5 years), but what massive cadences.
Click to expand...

That means 4 new generations in 7.5 years; so almost every 2 years. (Zen+ was a nice opportunistic clock bump and cache fix performance boost though).

libranskeptic said:
I think you flatter Intel to credit them with anything like that cadence, even in their glory days. Its in the nature of monopolies to do the minimum, and in the benefits of chiplets, to achieve such rapid, unblemished and productive cadence.
Click to expand...

10900K - May 2020 (increased core count, updated process)
11900K - March 2021 (new uarch)
12900K - Nov 2021 (two new uarchs + new process)
13900K - Oct 2022 (new cache structure, increased e-core count, updated process)
14900K - Oct 2023 (meh except for 6.2 GHz halo product achievement)
285K - Oct 2024 (new uarch + new process, first chiplet desktop processor)

They're still trying to get at least one new sellable product out per year even recently..
 
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