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FinFET Design at 14nm

Daniel Payne

Moderator
I just signed up for the webinar that Samsung and Synopsys are presenting next week on May 28. Should be an interesting one to learn more about FinFET design. Register online.

Enabling 14-nm FinFET Design: A Samsung Foundry and Synopsys Perspective on the Challenges and Opportunities


Date: Tuesday, May 28, 2013
Time: 11:00 AM PDT
Duration: 60-minutes


Samsung Foundry and Synopsys, together present the key challenges and opportunities of manufacturing with the Samsung 14LPE (14-nm FinFET) process, and how these changes impact the design enablement and flow. The change to FinFET devices brings many new opportunities to the designer; however, to ensure the greatest benefit, a close, collaborative partnership between the foundry and EDA supplier is paramount. Samsung Foundry will present the effects that this new technology paradigm brings, and how they leverage these to continue Moore’s Law. Synopsys will discuss how these challenges are being actively addressed in Synopsys’ IC Compiler and sign-off PDK tools and flows, thus enabling a smooth transition to the Samsung 14LPE process for our joint customers.

Speakers:

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Dr. Kuang-Kuo Lin
Director, Foundry Design Enablement, Samsung Semiconductor Inc. (SSI)


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Dr. Henry Sheng
Senior Director of R&D, Synopsys
 
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