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CoWoS packaging capacity increases quarterly

Daniel Nenni

Daniel Nenni

Admin
Staff member
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Artificial intelligence (AI) chip maker NVIDIA's 2nd quarter financial report and 3rd quarter financial forecast both surprised the market, mainly due to the substantial growth of AI-related data center business. The CoWoS advanced packaging production capacity is in short supply. It points out that the production capacity of other suppliers has been developed and certified in the key process. It is expected that the production capacity will gradually increase in the next few quarters; South Korea also feels the importance of the advanced packaging strategy in terms of production capacity related to advanced packaging CoWoS, and is rushing to catch up.

South Korea is catching up​

The semiconductor industry pointed out that the development of generative AI is faster than expected, so that the production capacity of advanced packaging cannot keep up with the demand. Under the situation of short supply, TSMC has outsourced part of the production capacity. As a result, UMC (2303) has strategically cooperated with Siliconware, and Amkor's Korean factory has also joined the ranks of supply capacity.

The legal person pointed out that due to the lack of equipment, TSMC will only increase its monthly production capacity of CoWoS advanced packaging from 10,000 pieces to a maximum of 12,000 pieces by the end of this year, and the monthly production capacity of CoWoS of other suppliers can increase to 3,000 pieces. To 25,000 pieces, other suppliers can increase to 5,000 pieces.

Korean media reported that Samsung is also actively developing advanced packaging technology and intends to grab orders from Huida; the South Korean government is also aware of the strategic importance of semiconductor packaging technology and is launching a major packaging technology research and development project. It is hoped that within 5 to 7 years, The field of advanced packaging has caught up with TSMC and other international giants, including TSMC, Amkor of the United States, and China Changdian Technology Group.

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CoWoS® platform provides best-in-breed performance and highest integration density for high performance computing applications. This wafer level system integration platform offers wide range of interposer sizes, number of HBM cubes, and package sizes. It can enable larger than 2X-reticle size (or ~1,700mm2) interposer integrating leading SoC chips with more than four HBM2/HBM2E cubes.

The Chronicle of CoWoS
  • 2023
    • News Release
      2023/04/06
      GUC Taped Out 3nm 8.6Gbps HBM3 and 5Tbps/mm GLink-2.5D IP using TSMC Advanced Packaging Technology
      LEARN MORE
  • 2022
    • News Release
      2022/07/07
      GUC Demonstrate World's First HBM3 PHY, Controller, and CoWoS Platform at 7.2 Gbps
      LEARN MORE
  • 2021
    • Industry Publication
      ECTC 2021
      Wafer Level System Integration of the Fifth Generation CoWoS®-S with High Performance Si Interposer at 2500 mm2
      LEARN MORE
    • News Release
      2021/08/31
      GUC Announces Industry Highest Bandwidth and Power Efficient Die-to-Die (GLink 2.0) Total Solution
      LEARN MORE
      2021/06/08
      GUC Tapes Out AI/HPC/Networking Platform on TSMC CoWoS® Technology Validating 7.2 Gbps HBM3 Controller and PHY, GLink-2.5D and 112G-LR SerDes IPs
      LEARN MORE
  • 2020
    • Industry Publication
      ECTC 2020
      Design and Analysis of Logic-HBM2E Power Delivery System on CoWoS® Platform with Deep Trench Capacitor
      LEARN MORE
    • News Release
      2020/11/17
      GUC Die-to-Die (D2D) Total Solution Opening the New Era of Flagship SoC
      LEARN MORE
      2020/09/09
      Rambus Advances HBM2E Performance to 4.0 Gbps for AI/ML Training Applications
      LEARN MORE
      2020/03/03
      TSMC and Broadcom Enhance the CoWoS Platform with World’s First 2X Reticle Size Interposer
      LEARN MORE
  • 2019
    • Industry Publication
      IEDM 2019
      Integrated Deep Trench Capacitor in Si Interposer for CoWoS Heterogeneous Integration
      LEARN MORE
    • Production Milestone
      More than 60 product tape-outs are in production or in development as of Aug. 2019
    • Customer Product
      Industry 1st 7nm GPU w/ deep learning accelerator
      • 1TB/s in BW4 HBM21X reticle interposer
      AI training accelerator w/ 1.2TB/s in BW
      • N16+
      • 4 HBM2
      • 1.5X reticle interposer
  • 2018
    • Customer Product
      Fujitsu A64FX
      LEARN MORE
      Build your 56G Enterprise Networking ASICs with MediaTek
      LEARN MORE
  • 2017
    • Customer Product
      Broadcom Announces Industry's First Silicon-Proven 7nm IP for ASICs in Deep Learning and Networking Applications
      LEARN MORE
      NEC "Aurora" Vector Engine vector processor
      LEARN MORE
      Nvidia TESLA GV100
      LEARN MORE
    • Industry Publication
      IEEE Transaction on electronics devices 2017
      Wafer-Level Integration of an Advanced Logic-Memory System Through the Second-Generation CoWoS Technology
      LEARN MORE
      IEDM 2017
      Advanced Heterogeneous Integration Technology Trend for Cloud and Edge
      LEARN MORE
  • 2016
    • Customer Product
      Nvidia TESLA GP100
      LEARN MORE
      Industry's first ASIC based AI accelerator from learning only to learning+inference
    • Industry Publication
      SEMICON Taiwan 2016
      Interposer Technology: Past, Now, and Future
      LEARN MORE
      SEMICON Taiwan 2016
      WLSI Extends Si Processing and Supports Moore's Law
      LEARN MORE
  • 2015
  • 2014
    • Customer Product
      HiSilicon Hi1616
      LEARN MORE
    • Industry Publication
      IEDM 2014
      A manufacturable interposer MIM decoupling capacitor with robust thin high-K dielectric for heterogeneous 3D IC CoWoS wafer level system integration
      LEARN MORE
      IEDM 2014
      Wafer Level System Integration for SiP
      LEARN MORE
      CICC 2014
      New System-in-Package (SiP) Integration technologies
      LEARN MORE
  • 2013
    • Industry Publication
      VLSI 2013
      Manufacturability Optimization and Design Validation Studies for FPGA-Based, 3D Integrated Circuits
      LEARN MORE
      IITC 2013
      Innovative Wafer-based Interconnect Enabling System Integration and Semiconductor Paradigm Shifts
      LEARN MORE
      ECTC 2013
      Reliability Evaluation of a CoWoS-enabled 3D IC Package
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  • 2012
    • Customer Product
      Xilinx 7V2000T/7V580T
      LEARN MORE
    • Industry Publication
      VLSI 2012
      An ultra-thin interposer utilizing 3D TSV technology
      LEARN MORE
  • 2011
    • Industry Publication
      ECTC 2011
      Advanced Reliability Study of TSV Interposers and Interconnects for the 28nm Technology FPGA
      LEARN MORE
 
Last edited:
I just seen an InFO packaged chip for the first time few days ago. Looks weird: exposed silicon back side, and strange, very hard epoxy around it, likely filled with glass filler to the bream.
 
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