Semiwiki on LinkedIn Semiwiki on Facebook Semiwiki on Twitter Register / Log in 
Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/are-there-tools-that-create-power-format-files-out-of-data-base.1801/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021770
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Are there tools that create power format files out of data-base?

M

mannes

Guest
Hi,

I'm looking for a tool that can create CPF or UPF (it is better if it can do both) file out of any kind of data-base format.
There are many ways to describe my design and its functions. Many times, I find that I have DB (data-base) that defines the functionality </SPAN>as Excel file or Xml file. Some time it is not clear that it is DB, but it is a draw that generates even the RTL.
It is clear that a tool that can generate the code of power behavior will save the errors of implementations and focus in definitions.
A tool that will generate both of CPF and UPF will enable working with any EDA tool when planning ASIC with power issue.
That will be a way to avoid from translates one to the other....

Best Regards,

Shai
 
Hi once more,</SPAN>
I’ll expand a little and ask “If I had a tool that create CPF or UPF out of Data Base (Any you wish), would you consider use it or even buy it?”</SPAN>
We do! </SPAN>
BR</SPAN>
Shai</SPAN>
 
Are you talking about creating just the power domains for the given design or all the details about flop retention / isolations and all ??? Because sometimes it is based on design architecture as well , can't be generic.
 
What kind of "DB" would you extract this data from? And, unless you're in stealth mode, who is "we" in "We do!"?
 
Hi mannes,

Talk to Cadence AEs. At DAC this year, Cadence had a demo showing how to extract power intent information for mixed-signal designs from VSE. It also has something for pure digital flows.
 
Isolation clamping into "0" , "1" or "last value", level shifters power domains and many more of the power aspects can be use from single DB. I’m looking for something that usually works for most of the cases. I’m not looking for a tool that will solve all the problems with CPF and UPF convergence. The task of unified UPF and CPF will left for others…. </SPAN>
 
I work this days at CSR in a team that is looking into tools that can help use make better chips. My task is to come with a solution in the power area. I was looking around a while before posting here. I think that about 95% of what is up here we already know and checked in the last month. I asked for “interested” votes that I can ask from EDA vendor to support my ideas and develop a tool or a convertor. As there no true solution from an EDA company we will probably need to come with a solution of our own. We have a solution that can work in the near future but en external one is more welcome.</SPAN>
I think that all will earn if the tools in the power area will be more common.</SPAN>
 
You must log in or register to reply here.
Back
Top