A review of Intel's first Foundry Attempt

[Artificer60]

It is a bit long, but it is an interesting take on Intel's first attempt to enter the foundry business. I'd be interested in hearing a bit more about Daniel Nenni's experience at TSMC when they lost the Altera business. I did find it interesting that TSMC viewed the experience as a lesson to learn from. Hopefully Intel will develop a similar attitude under Lip-Bu Tan.

 

[Daniel Nenni]

True, I was at TSMC FAB 12 when the story broke about Altera defecting to Intel. Morris Chang did in fact announce it over the PA and said it would be a learning experience. I do not think TSMC could have prevented this however, it really was about Altera not being able to compete with Xilinx on a level process playing field.

I worked with Altera down to 40nm. Altera and TSMC were closely coupled. TSMC used Altera FPGAs to ramp processes and Altera was first to a new node which was a big deal in the FPGA business back then. Xilinx had a similar relationship with UMC, in fact, a complete floor in UMC HQ was dedicated to Xilinx employees. It really was like a JV for process development. Unfortunately, Xilinx and UMC fell behind at 65nm and 40nm so Xilinx jumped to TSMC at 28nm. In fact, Xilinx beat Altera to 28nm silicon. It was a very wise move for Xilinx, absolutely.

The mistake TSMC made was providing a level playing field for Altera and Xilinx and treating the competitors equally thus ignoring the previous close relationship with Altera. It was the Morris Chang way, be a friend to all. Xilinx was clearly beating Altera at the silicon level, Xilinx had one of the best foundry teams I have every worked with and they still are today. Altera had no choice but to pivot to Intel and the rest as they say is history. Intel ended up buying Altera for a premium and Xilinx went on to dominate the market in partnership with TSMC.

The transition from TSMC to Intel was a big challenge for Altera. I still had ties to Altera and was told that the first DRC manual was redacted and unusable. The PDK was not good for foundry customers either. This caused delays for Altera and Xilinx sped ahead. I heard of similar problems with the first foundry customers Intel pursued back then. It is now said that Intel Foundry failed due to not being customer centric, which is true, but in reality Intel did not have the necessary tools (PDKs) and ecosystem to be successful in the foundry business.

 

[XtorTourist]

The mistake TSMC made was providing a level playing field for Altera and Xilinx and treating the competitors equally thus ignoring the previous close relationship with Altera. It was the Morris Chang way, be a friend to all. Xilinx was clearly beating Altera at the silicon level, Xilinx had one of the best foundry teams I have every worked with and they still are today. Altera had no choice but to pivot to Intel and the rest as they say is history. Intel ended up buying Altera for a premium and Xilinx went on to dominate the market in partnership with TSMC.

That sounds more like a mistake for Altera than TSMC. Altera turned one risk (design) into two (design and Intel foundry).

 

[MAB]

True, I was at TSMC FAB 12 when the story broke about Altera defecting to Intel. Morris Chang did in fact announce it over the PA and said it would be a learning experience. I do not think TSMC could have prevented this however, it really was about Altera not being able to compete with Xilinx on a level process playing field.

Given that you think that it could not have been prevented, what learnings do you think TSMC ended up taking from the whole event?

 

[OneEng]

True, I was at TSMC FAB 12 when the story broke about Altera defecting to Intel. Morris Chang did in fact announce it over the PA and said it would be a learning experience. I do not think TSMC could have prevented this however, it really was about Altera not being able to compete with Xilinx on a level process playing field.

I worked with Altera down to 40nm. Altera and TSMC were closely coupled. TSMC used Altera FPGAs to ramp processes and Altera was first to a new node which was a big deal in the FPGA business back then. Xilinx had a similar relationship with UMC, in fact, a complete floor in UMC HQ was dedicated to Xilinx employees. It really was like a JV for process development. Unfortunately, Xilinx and UMC fell behind at 65nm and 40nm so Xilinx jumped to TSMC at 28nm. In fact, Xilinx beat Altera to 28nm silicon. It was a very wise move for Xilinx, absolutely.

The mistake TSMC made was providing a level playing field for Altera and Xilinx and treating the competitors equally thus ignoring the previous close relationship with Altera. It was the Morris Chang way, be a friend to all. Xilinx was clearly beating Altera at the silicon level, Xilinx had one of the best foundry teams I have every worked with and they still are today. Altera had no choice but to pivot to Intel and the rest as they say is history. Intel ended up buying Altera for a premium and Xilinx went on to dominate the market in partnership with TSMC.

The transition from TSMC to Intel was a big challenge for Altera. I still had ties to Altera and was told that the first DRC manual was redacted and unusable. The PDK was not good for foundry customers either. This caused delays for Altera and Xilinx sped ahead. I heard of similar problems with the first foundry customers Intel pursued back then. It is now said that Intel Foundry failed due to not being customer centric, which is true, but in reality Intel did not have the necessary tools (PDKs) and ecosystem to be successful in the foundry business.

I used to really like the Altera toolset for their FPGA's. IIRC, they were power hungry though, and Xilinx had more hardware options. Xilinx tools on the other hand were very clunky. I am guessing that the modern toolset for Xilinx is pretty amazing. Sadly, I haven't done any FPGA work in a while. The products I have been working on the last couple of decades require less cost and power than an FPGA design can give. They were super cool though!

 

[Artificer60]

The transition from TSMC to Intel was a big challenge for Altera. I still had ties to Altera and was told that the first DRC manual was redacted and unusable. The PDK was not good for foundry customers either. This caused delays for Altera and Xilinx sped ahead. I heard of similar problems with the first foundry customers Intel pursued back then. It is now said that Intel Foundry failed due to not being customer centric, which is true, but in reality Intel did not have the necessary tools (PDKs) and ecosystem to be successful in the foundry business.

The comment about the manual with the redacted information reminds me of the ridiculous levels that "protecting" IP were said to have reached at Intel. I was once told by an Intel employee that the height of the D1X fab building was considered IP. This despite the fact that anyone with a pair of eyes and an understanding of basic trigonometry could easily determine that by themselves.

Somehow I don't think that is what Andy Grove meant by "only the paranoid survive".

For all his many faults, I believe that Gelsinger understood that Intel needed a much more open approach if Intel was going to be taken seriously as a foundry player. And to my understanding Intel is being much more open and willing to conform to industry standards than they were in their last foundry attempt. I expect Tan to double down on what Gelsinger started there.

 

[Daniel Nenni]

That sounds more like a mistake for Altera than TSMC. Altera turned one risk (design) into two (design and Intel foundry).

Altera was sold for a premium so someone made money. Spinning Altera out was the right thing for Intel to do. Hopefully it gets sold.

Given that you think that it could not have been prevented, what learnings do you think TSMC ended up taking from the whole event?

It was humbling for sure. It is good to be humbled when you are #1. I did not see Intel acquiring Altera at the time but rumor has it Altera threatened Intel with going back to TSMC to put the pressure on.

 

[Paul2]

Few remember that Intel's first foundry attempt was when they were a memory company.

They had tons of capacity, and memory was getting too cheap, so back then they did try a few contract manufacturing projects at that spare cap.

 

[siliconbruh999]

Few remember that Intel's first foundry attempt was when they were a memory company.

They had tons of capacity, and memory was getting too cheap, so back then they did try a few contract manufacturing projects at that spare cap.

That was in 80s though

 

[KevinK]

but in reality Intel did not have the necessary tools (PDKs) and ecosystem to be successful in the foundry business.

That’s it - and it was super painful to explain to them what they were missing because the technology group controlled all the resources and proprietary knowledge about design and routing rules and wouldn’t /couldn’t explain or consider changes. I love the pizza analogy. It’s like Intel got incredibly good at making the best non-traditional pizza in the world (BBQ chicken like CPK ?), but then was only willing to make tiny changes for customers. Some of the examples:
* Customers wanted pepperoni (traditional standard cell libraries characterized for a standard design flow) but could only get spicy chicken sausage (slightly modified Intel internal standard cells with slightly different characterizations, that were still optimized for Intel design methodology and led to tons of setup and hold violations with normal design methodology)
* Customers wanted mozzarella cheese (dense routing) but Intel had optimized for the chicken and onion topping, and only offered Gouda (performance oriented, with only unidirectional routing on the first four layers, if I remember correctly)
* Customers also had to add additional cheese to their working design, just to make the cooking process work (live metal fill for CMP).
* Finally, there was no way to do a comparative taste test (measure PPA) or improvement against other pizza makers because Intel foundry didn’t have the full set of industry standard RTL-level IP (or really the standard cells or memories at 22nm or even 14nm) to do DCTO.

And by the time they finally invested in filling out their foundry offering for 10nm, their process issues and delays driven by their over-aggressive 10nm goals forced a company-reset.