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It looks based on a "modified double patterning" (i.e., double double or quadruple patterning) capable of going from 18 nm to 10 nm between now and 2020.
It looks based on a "modified double patterning" (i.e., double double or quadruple patterning) capable of going from 18 nm to 10 nm between now and 2020.
The BusinessKorea article says EUV equipment is necessary for <18nm DRAM process and comes at a cost of $87MM per unit. The article also points out Samsung has a lead of about 1 year over Hynix and Micron, in DRAM.
It looks based on a "modified double patterning" (i.e., double double or quadruple patterning) capable of going from 18 nm to 10 nm between now and 2020.
At IEDM Samsung disclosed a single mask - double spacer approach to printing contacts for DRAM. That is likely what they will use at 18nm. I plan to blog about the process in the next couple of weeks.
The BusinessKorea article says EUV equipment is necessary for <18nm DRAM process and comes at a cost of $87MM per unit. The article also points out Samsung has a lead of about 1 year over Hynix and Micron, in DRAM.
I am familiar with those articles, thanks, I was thinking to add them but the Digital Times was the most recent native source so I went with that. It indicated SK Hynix would be a half year behind on 18 nm. Ironically 18 nm to 10 nm is smoother with quadruple patterning as fixed process than the EUV route, which has to switch to double patterning at 10-12 nm.
When demand is strong the way to maximize profit is to run your mature, high yielding device. When profit per wafer is lower there is no financial harm to running a more advanced, but lower yielding process. In fact, taken to the extreme; when a fab is running negative cash flow, better to not run wafers than to run them.
Hence the '6 months ahead of schedule'... is just another way of saying demand is weak and prices are falling, ... we haven't seen the market bottom yet.
