Global Wafer Capacity 2021-2025

[Daniel Nenni]

Major changes continue with the IC manufacturing base! [/B] The IC market enjoyed a double-digit increase in sales in 2020 and is forecast to see double-digit revenue gains each year through 2023. It is not surprising that fab capacity levels are on the rise to support this forecast growth. Global wafer capacity growth in 2020 was the strongest since 2011 despite the Covid-19 pandemic. The forecast calls for even greater capacity expansion in 2021.

IC Insights' newly updated Global Wafer Capacity study is an ideal tool for understanding the "new realities" of the market. This study offers a detailed breakdown of the IC industry's wafer fab capacity as it stood at the end of 2020 and forecasts capacity for each year through 2025. Data was compiled, summarized, and extended into the future using both bottom-up and top-down research methodologies. Surveys of hundreds of fabs from around the world formed the basis for analyzing the IC industry's current capacity status. Future projections were based on both survey results and IC Insights' overall economic forecast for the IC industry.

The Global Wafer Capacity 2021-2025 study will greatly assist IC material and equipment suppliers in creating long-term strategic market plans by showing current industry capacity, projecting future capacity loads, and dissecting capacity data into several categories and regions.[/LEFT][/TD]

The Global Wafer Capacity study offers the most thorough and cost-effective examination and five-year forecast of the IC industry's fab capacity. With more dramatic changes ahead for the IC manufacturing base, don't be caught looking backward. Order your copy today!
https://www.icinsights.com/services/global-wafer-capacity/pricing-order-forms/

For more information about Global Wafer Capacity 2021-2025 and to download a complete brochure with order form, visit https://www.icinsights.com/services/global-wafer-capacity/

 

[peter]

Taiwan has 21% <10nm installed capacity, Korea has 13% <10nm installed capacity and yet somehow, 37% of the worldwide total installed capacity is <10nm... it's like their one job is to put out correct data and they somehow screwed it up

Should be 7% for <10nm, 39% for 10-20nm, 11% for 20-40nm, 20% for 40nm-0.18µ and 23% for >0.18µ for the total, they added 10-20nm figures from areas outside Taiwan/Korea to the cumulative <10nm figures to come up with 37%...

 

[kvas]

Taiwan has 21% <10nm installed capacity, Korea has 13% <10nm installed capacity and yet somehow, 37% of the worldwide total installed capacity is <10nm... it's like their one job is to put out correct data and they somehow screwed it up

Should be 7% for <10nm, 39% for 10-20nm, 11% for 20-40nm, 20% for 40nm-0.18µ and 23% for >0.18µ for the total, they added 10-20nm figures from areas outside Taiwan/Korea to the cumulative <10nm figures to come up with 37%...

Yeah, I was also confused after looking at that chart. "But this doesn't add up!"

 

[jpkleinhans]

Taiwan has 21% <10nm installed capacity, Korea has 13% <10nm installed capacity and yet somehow, 37% of the worldwide total installed capacity is <10nm... it's like their one job is to put out correct data and they somehow screwed it up

Should be 7% for <10nm, 39% for 10-20nm, 11% for 20-40nm, 20% for 40nm-0.18µ and 23% for >0.18µ for the total, they added 10-20nm figures from areas outside Taiwan/Korea to the cumulative <10nm figures to come up with 37%...

Good point. I'm probably missing something and/or my math is completely wrong but the numbers don't add up at all:

For <10nm:

• TW: 0,21 * 4,5M = 0,945M wafers
• SK: 0,13 * 4,1M = 0,533M wafer
• - - - - - - - - - -
• TOTAL <10nm: 1,478M wafers vs 7,696M wafers (0,37 * 20,8M)

Could someone point out where I'm wrong? The numbers for >10nm - <20nm don't make sense as well.

 

[Daniel Nenni]

Good point. I'm probably missing something and/or my math is completely wrong but the numbers don't add up at all:

For <10nm:

• TW: 0,21 * 4,5M = 0,945M wafers
• SK: 0,13 * 4,1M = 0,533M wafer
• - - - - - - - - - -
• TOTAL <10nm: 1,478M wafers vs 7,696M wafers (0,37 * 20,8M)

Could someone point out where I'm wrong? The numbers for >10nm - <20nm don't make sense as well.

I asked ICinsights for some clarity. Stay tuned.

 

[peter]

Good point. I'm probably missing something and/or my math is completely wrong but the numbers don't add up at all:

For <10nm:

• TW: 0,21 * 4,5M = 0,945M wafers
• SK: 0,13 * 4,1M = 0,533M wafer
• - - - - - - - - - -
• TOTAL <10nm: 1,478M wafers vs 7,696M wafers (0,37 * 20,8M)

Could someone point out where I'm wrong? The numbers for >10nm - <20nm don't make sense as well.

Yeah, I posted what the percentages should be for the global total:

7% for <10nm
39% for 10-20nm
11% for 20-40nm
20% for 40nm-0.18µ
23% for >0.18µ

Not even sure how they got their numbers, I tried calculating with my theory that they screwed up <10nm numbers by using 10-20nm proportions for the countries not Taiwan or Korea, but it still couldn't add up to 37%

 

[Daniel Nenni]

The chart has been updated:

 

[tonyget]

Does DRAM/3D NAND all fall into 10-20nm category ？

 

[peter]

Does DRAM/3D NAND all fall into 10-20nm category ？

A good chunk of DRAM, yes. As for 3D NAND, seems like it should be <40nm - ≥20nm or ≥40nm geometry:

Why 3D NAND is Stuck at 40nm – The Memory Guy

...though the figures for <20nm - ≥10nm out of Korea and especially Japan seems to indicate they're placing 3D NAND in that category. I'd imagine Kioxia/WD having the greatest proportion of wafer capacity in Japan but seeing as to how there's zero capacity in the <40nm - ≥20nm category and since they don't produce DRAM, it appears they're giving it to the <20nm - ≥10nm category. The balance of Japan's <20nm - ≥10nm is probably Micron's Hiroshima fab which is entirely DRAM.

Can't imagine getting much write endurance out of them if they go any smaller with QLC, much less PLC or thereafter for 3D NAND if they go smaller.

 

[jpkleinhans]

Just wondering: Europe's share in <20nm - ≥10nm is solely Intel in Ireland & Israel? Because GloFo Dresden is only 22nm FDSOI -- or am I missing fabs?

 

[Paul2]

A good chunk of DRAM, yes. As for 3D NAND, seems like it should be <40nm - ≥20nm or ≥40nm geometry:

Why 3D NAND is Stuck at 40nm – The Memory Guy

...though the figures for <20nm - ≥10nm out of Korea and especially Japan seems to indicate they're placing 3D NAND in that category. I'd imagine Kioxia/WD having the greatest proportion of wafer capacity in Japan but seeing as to how there's zero capacity in the <40nm - ≥20nm category and since they don't produce DRAM, it appears they're giving it to the <20nm - ≥10nm category. The balance of Japan's <20nm - ≥10nm is probably Micron's Hiroshima fab which is entirely DRAM.

Can't imagine getting much write endurance out of them if they go any smaller with QLC, much less PLC or thereafter for 3D NAND if they go smaller.

QLC will make sense for 20+ terabyte drives, just like TLC chips can work as good as MLC in cacheless SSDs once the size starts to close on the 4TB mark.