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Google and Nvidia Consider Intel as Backup Chip Manufacturer - The Information

I thought Elon Musk wanted to license Intel's 14A process technology and produce chips at SpaceX–Tesla's own Terafab. It would have no effect on Intel Foundry's capacity and utilization. Has something changed recently?
That he might hit a problem, because there isn't any ASML high NA euv machine available for him before 2030, He speak Dutch i.e Afrikaans, there is no communication gap between him and ASML.
 
That he might hit a problem, because there isn't any ASML high NA euv machine available for him before 2030, He speak Dutch i.e Afrikaans, there is no communication gap between him and ASML.

You underestimate Elon Musk. His vision for Terafab is to allow people to eat, drink, and possibly smoke next to the production line. In that sense, ASML's EUV tools are not only disqualified but also unnecessary. 😀
 
All depends on Elon Musk, what Intel needs is not a real cash from customer, it needed a real commitment to 14A, let say if Elon Musk sign a commitment of 30 million chip then the capacity will be 30 million chip i.e around 300K waffle.

Another one that is not on the surface is how many Apple needs.

Intel Internally will budget for 480K waffle p.a., anything extra need commitment from Customer.

The next is 18A capacity allocation, therefore how many waffle and its allocation of Intel 3 in 2028:
Question and Answer that the CEO needed to make:
How he think the market of iGPU, can the new "Lakes" desktop CPU can be within 5% of AMD will be offer.
A - if that is the case, then they can use a "weak" GPU and start arrange iGPU on top desktop GPU to have "weak" iGPU, since those machine will have 6080 anyway.
B - If the desktop still can't be within 5% of AMD will be offer then pair it with a strong iGPU to go for mid-range market. Then Intel 3 is out of the picture goes for Arc 3 on 18A.

Then the next best thing is how Steam going to react:
Since in pure performance the current panther lake is ahead of what AMD is offering, can Intel get the Steam 2 or another offering like PSP xbox ... . If that is the case then they needed 18A capacity to be doing iGPU.

Then of course the 14A capacity is going to be upward of 500K waffle p.a. for Intel internal alone. Because if the desktop design is great again, that will impact the server market and that 500K is just to signal the Intel server market recovery. Although that is 3 years away, but they can get Dell for commitment since the server market is running so hot. Ask Dell to be committed helps Intel to get its cash flow forecasted, allocated better availability for those who will be committing now

If Apple and SpaceX is all fully committed, then Intel can easily go to the bank and get some cash flow, but if not then 500K, the most likely situation is 750K p.a.

For ASML EXE 5200 is listed as 175 per hour, but remember that GAA is 4 layers for 18A (assume that is 4 in 14A), I am not an insider but I think they needed 2-3 runs for each layer, that is already 8 runs, plus the top 3 line layer will be High NA EUV, that make it 10-12 run, then the maths, but I don't have that much time and as I don't have perfect data it is so difficult to estimate, so in short I think Intel needs 10 - 16 High NA EUV to make any sense to reach a reasonable level.
What if there will be no more than 10 HiNA EUV in Intel by end of 2028 even 2029. Will you change you forecast? That's the most fundamental question I have for recent Intel "positive" news. All the "huge" demand from newspapar can't match HiNA EUV shipment.
 
What if there will be no more than 10 HiNA EUV in Intel by end of 2028 even 2029. Will you change you forecast? That's the most fundamental question I have for recent Intel "positive" news. All the "huge" demand from newspapar can't match HiNA EUV shipment.

Do we know when Intel will use HNA-EUV? From what I have heard it is not 14A for foundry customers.
 
Do we know when Intel will use HNA-EUV? From what I have heard it is not 14A for foundry customers.
14A is potentail node for Intel in HNA, but definitely not tsmc A14 (at least not first generation A14). Even Intel won't use HNA in 14A, Intel still don't have sufficient low-NA EUV capacity for "huge" demand in newspaper now. Let's keep monitoring
 
14A is potentail node for Intel in HNA, but definitely not tsmc A14 (at least not first generation A14). Even Intel won't use HNA in 14A, Intel still don't have sufficient low-NA EUV capacity for "huge" demand in newspaper now. Let's keep monitoring
No they will, if the mask size can fit, because High NA EUV mask can produce a chip that is in max 1/2 size of Low NA EUV. So if the Mask size can fit then it is High NA EUV, we are not 100% sure i.e. stitching

What if there will be no more than 10 HiNA EUV in Intel by end of 2028 even 2029. Will you change you forecast? That's the most fundamental question I have for recent Intel "positive" news. All the "huge" demand from newspapar can't match HiNA EUV shipment.
ASML is production rate is around 12 p.a. High NA Machine is not assembly in Europe, but whether the location of the installer, in Intel case that is USA. Take a gain of salt from ASML, and let say there is 8 machine that ASML produce per year, and half of them is allocated to Intel, that is around the level that 4 per year, so that by 2028 Intel with the initial 2025 allocation (2 added) should have at least 10 if not even more by Q4 2027. So I don't need to change my forecast, when I did a bit of research even using AI only, Google AI shows me that 12 p.a. 50-60% to Intel ongoing, my forecast is rough but is still sounded.

In the main time, the research machine and whether they slowly install should address the required for initial tape out, using the shape of Clearwater Forest and/or Panther Lake, they might be using that to do an initial testing tape out already. This is the advantage of internal fab, they can do an High NA EUV run and still get a working chip and sell it as it is, no one know / care that the chip was made using High NA or not, they can ramp the new machine quickly and master the stitching process.

14A is potentail node for Intel in HNA, but definitely not tsmc A14 (at least not first generation A14). Even Intel won't use HNA in 14A, Intel still don't have sufficient low-NA EUV capacity for "huge" demand in newspaper now. Let's keep monitoring
My forecast on TSMC timeline is around 2035, so this is that bad, is just like a Boeing / Airbus, you needed to pay to get a slot, even you think that slot is very expensive, at the end, TSMC is running B747/A340 but your competitor is running B787/B777/A350, the economic will not work out. Even if A14 is on Low NA, if I am CC Wei, I will now buy a slot, since even I pay now for the slot, it will only be available in 2032 at best
 
No they will, if the mask size can fit, because High NA EUV mask can produce a chip that is in max 1/2 size of Low NA EUV. So if the Mask size can fit then it is High NA EUV, we are not 100% sure i.e. stitching


ASML is production rate is around 12 p.a. High NA Machine is not assembly in Europe, but whether the location of the installer, in Intel case that is USA. Take a gain of salt from ASML, and let say there is 8 machine that ASML produce per year, and half of them is allocated to Intel, that is around the level that 4 per year, so that by 2028 Intel with the initial 2025 allocation (2 added) should have at least 10 if not even more by Q4 2027. So I don't need to change my forecast, when I did a bit of research even using AI only, Google AI shows me that 12 p.a. 50-60% to Intel ongoing, my forecast is rough but is still sounded.

In the main time, the research machine and whether they slowly install should address the required for initial tape out, using the shape of Clearwater Forest and/or Panther Lake, they might be using that to do an initial testing tape out already. This is the advantage of internal fab, they can do an High NA EUV run and still get a working chip and sell it as it is, no one know / care that the chip was made using High NA or not, they can ramp the new machine quickly and master the stitching process.


My forecast on TSMC timeline is around 2035, so this is that bad, is just like a Boeing / Airbus, you needed to pay to get a slot, even you think that slot is very expensive, at the end, TSMC is running B747/A340 but your competitor is running B787/B777/A350, the economic will not work out. Even if A14 is on Low NA, if I am CC Wei, I will now buy a slot, since even I pay now for the slot, it will only be available in 2032 at best
I fell you overestimate Intel's business and way-underestimate tsmc. My personal forecast is that Intel will have only 6 HNA by end of 2028, which can contribute ~15k wspm or even 10k only (1 or 2 HNA stay in R&D, 3 or 4 used for HVM). tsmc will start HNA HVM in A10 and A14-Gen2 in late 2029. The reason tsmc doesn't use HNA earlier is the same reason as they sticked with immersion machine in N7 --> EUV machine was not matured and qual-pattern was still manageable.
There are two HNA in tsmc today, which is maybe fewer than Intel, but don't think it means tsmc will never use HNA EUV until 2035.
 
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I fell you overestimate Intel's business and way-underestimate tsmc. My personal forecast is that Intel will have only 6 HNA by end of 2028, which can contribute ~15k wspm or even 10k only (1 or 2 HNA stay in R&D, 3 or 4 used for HVM). tsmc will start HNA HVM in A10 and A14-Gen2 in late 2029. The reason tsmc doesn't use HNA earlier is the same reason as they sticked with immersion machine in N7 --> EUV machine was not matured and qual-pattern was still manageable.
There are two HNA in tsmc today, which is maybe fewer than Intel, but don't think it means tsmc will never use HNA EUV until 2035.
That amount of EUV High NA i.e. 6 is really underestimate, because SK Hynix will have this much in Q4 2028.

Whether the machine is mature enough for production vs whether the machine is mature enough to place an order is not the same concept. The only thing that might not be mature enough is the strength of the light source, and that part is always upgradable.

There isn't any High NA Machine installed, I used Google AI, all article mentioned "Will Be" but not Installed, there isn't any High NA EUV machine owned by TSMC, the one that TSMC can access is the one that is with an EU research (government owned - IMEC I think), not fully owned by TSMC. This is so minor, because even then you don't have 10 machine, it didn't make the mix, 1/2/3 machine is not important, the point is that no HVM of High NA EUV ~2035.

A funny way to interpreted this from CC Wei "他更幽默地補充,公司不僅沒有不投資,實際上「已經買了,而且買幾台就不好意思講」" Yes We brough it, it was 0.5 machine, I shared that with IMEC :)

No way that it will be in 2029, timeline just don't cut it. 2026 N2, 2027 N2P, 2028 N2U/A16 2029 A14 that is a more realistic situation.

Doing a node is not like playing with sand, even they mentioned full backward compatibility (EDA), when things change, there is a lot of things needed to be reverify, design backward compatibility is not equal to supply chain backward compatibility, i.e. things still needed to reverify, to be fair, it take 2-5 years to design and/or upgrade the design of a Chip. It is not like because of TSMC schedule, please push this from A16 to A14 or push that from N2 to N2P. That is not how it works.

To be backward compatibility meant that the design is more towards the 2 years rather than 5 years, not like will enable switching from node to node.

Planning this out, AMD is off, the Zen 6 is already on N2P, can't see Zen 6+ only see Zen 7 should be in 2030, nVidia is out since the size of the chip to do A16 on as launch customer is just asking for trouble, so Meditek, Apple, Google Mobile left.

I am not the one who can say anything, but in my point of view, A10 or 10A needed to be CFET, Intel VSLI recent is gearing towards that. Because 18A is a 4 stack GAA and N2 is a 3 stack GAA, just make 18A easier to achieve CFET (since it is higher to start of with).

If you don't agree that TSMC will only have the High NA EUV with meaning production volume only in 2035 then show me the place where CC Wei that he purchased and where it will be Installed, even with Taiwanese efficiency, High NA machine is substantive larger, which building currently being build to house that 10 machine, where is the plan = "0", if you plan now, building 3-5 years, 2 years to install the machine i.e. 10 machines, that will give you HVM 2035 timeline, ASML is not going to pre assemble the High NA machine, the part will not be store in ASML locations, it will be at the customer site, sorry, if you still have 3-5 years before you get the correct site, then talk to me 3 - 5 years time. Get your construction permit and plan and everything ready.

In my opinion, I am not underestimate TSMC and overestimate Intel, I am actually overstated TSMC and understated Intel. That is my point of view, TSMC in my point of view is only worth 1/4 of todays market cap
 
There isn't any High NA Machine installed, I used Google AI, all article mentioned "Will Be" but not Installed, there isn't any High NA EUV machine owned by TSMC, the one that TSMC can access is the one that is with an EU research (government owned - IMEC I think), not fully owned by TSMC. This is so minor, because even then you don't have 10 machine, it didn't make the mix, 1/2/3 machine is not important, the point is that no HVM of High NA EUV ~2035.

TSMC already bought and installed ASML High NA EUV machine:

"During TSMC's recent annual shareholders meeting, in response to a shareholder's question about whether TSMC was making a mistake by not purchasing High-NA EUV tools, CEO C. C. Wei said that TSMC had in fact purchased High-NA EUV systems, although he declined to reveal the total number acquired.

Mr. Wei also said that the current challenge is that High-NA EUV throughput is not yet sufficient. He added that TSMC is working hard to improve its productivity."



 
That amount of EUV High NA i.e. 6 is really underestimate, because SK Hynix will have this much in Q4 2028.

Whether the machine is mature enough for production vs whether the machine is mature enough to place an order is not the same concept. The only thing that might not be mature enough is the strength of the light source, and that part is always upgradable.

There isn't any High NA Machine installed, I used Google AI, all article mentioned "Will Be" but not Installed, there isn't any High NA EUV machine owned by TSMC, the one that TSMC can access is the one that is with an EU research (government owned - IMEC I think), not fully owned by TSMC. This is so minor, because even then you don't have 10 machine, it didn't make the mix, 1/2/3 machine is not important, the point is that no HVM of High NA EUV ~2035.

A funny way to interpreted this from CC Wei "他更幽默地補充,公司不僅沒有不投資,實際上「已經買了,而且買幾台就不好意思講」" Yes We brough it, it was 0.5 machine, I shared that with IMEC :)

No way that it will be in 2029, timeline just don't cut it. 2026 N2, 2027 N2P, 2028 N2U/A16 2029 A14 that is a more realistic situation.

Doing a node is not like playing with sand, even they mentioned full backward compatibility (EDA), when things change, there is a lot of things needed to be reverify, design backward compatibility is not equal to supply chain backward compatibility, i.e. things still needed to reverify, to be fair, it take 2-5 years to design and/or upgrade the design of a Chip. It is not like because of TSMC schedule, please push this from A16 to A14 or push that from N2 to N2P. That is not how it works.

To be backward compatibility meant that the design is more towards the 2 years rather than 5 years, not like will enable switching from node to node.

Planning this out, AMD is off, the Zen 6 is already on N2P, can't see Zen 6+ only see Zen 7 should be in 2030, nVidia is out since the size of the chip to do A16 on as launch customer is just asking for trouble, so Meditek, Apple, Google Mobile left.

I am not the one who can say anything, but in my point of view, A10 or 10A needed to be CFET, Intel VSLI recent is gearing towards that. Because 18A is a 4 stack GAA and N2 is a 3 stack GAA, just make 18A easier to achieve CFET (since it is higher to start of with).

If you don't agree that TSMC will only have the High NA EUV with meaning production volume only in 2035 then show me the place where CC Wei that he purchased and where it will be Installed, even with Taiwanese efficiency, High NA machine is substantive larger, which building currently being build to house that 10 machine, where is the plan = "0", if you plan now, building 3-5 years, 2 years to install the machine i.e. 10 machines, that will give you HVM 2035 timeline, ASML is not going to pre assemble the High NA machine, the part will not be store in ASML locations, it will be at the customer site, sorry, if you still have 3-5 years before you get the correct site, then talk to me 3 - 5 years time. Get your construction permit and plan and everything ready.

In my opinion, I am not underestimate TSMC and overestimate Intel, I am actually overstated TSMC and understated Intel. That is my point of view, TSMC in my point of view is only worth 1/4 of todays market cap
well... I'm 100% sure tsmc has his 1st HiNA EUV delivered in 2024 and 2nd one delivered in 2026. both machines are in Taiwan, not iMEC................. and no, Hynix will NOT have that many HNA by Q4 2028, like you said.... anyhow... I can't share my info source and time will tell :)

p.s. found it was revealed in this link in 2024 already https://www.taiwannews.com.tw/news/5965007
 
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A funny way to interpreted this from CC Wei "他更幽默地補充,公司不僅沒有不投資,實際上「已經買了,而且買幾台就不好意思講」" Yes We brough it, it was 0.5 machine, I shared that with IMEC :)

"Yes We brough it, it was 0.5 machine, I shared that with IMEC"

To avoid any confusion, the above comment regarding TSMC sharing a High‑NA EUV machine with IMEC reflects @my_wing’s own views, not the words of TSMC CEO C. C. Wei. In fact, throughout the entire TSMC shareholders’ meeting, IMEC was not mentioned even once.
 
High NA machine is substantive larger, which building currently being build to house that 10 machine, where is the plan = "0", if you plan now, building 3-5 years, 2 years to install the machine i.e. 10 machines, that will give you HVM 2035 timeline,

TSMC’s Fab 21 in Phoenix, Arizona began construction on a desert site in April 2021 and entered high volume manufacturing (HVM) in late 2024.

This means it took TSMC roughly three to four years to build the fab from scratch and bring it into HVM in the United States. In Taiwan, the it's typically one to two years shorter due to greater availability of resources, deeper experience, a more established labor base, and abundant support from partners.
 
TSMC’s Fab 21 in Phoenix, Arizona began construction on a desert site in April 2021 and entered high volume manufacturing (HVM) in late 2024.

This means it took TSMC roughly three to four years to build the fab from scratch and bring it into HVM in the United States. In Taiwan, the it's typically one to two years shorter due to greater availability of resources, deeper experience, a more established labor base, and abundant support from partners.
Also this a process that has been in HVM in Taiwan for some time
 
well... I'm 100% sure tsmc has his 1st HiNA EUV delivered in 2024 and 2nd one delivered in 2026. both machines are in Taiwan, not iMEC................. and no, Hynix will NOT have that many HNA by Q4 2028, like you said.... anyhow... I can't share my info source and time will tell :)

p.s. found it was revealed in this link in 2024 already https://www.taiwannews.com.tw/news/5965007
Don't miss understood will be installed vs installed, although your article is behind the pay wall, I search for this topic for months, all is will be, Search the Chinese and English source, not consistent, but for one thing I am sure, as a person living as South African for 10s of years, I can assure you that the Dutch people will come out and said ASML has sell EUV High NA machine to TSMC if that is ever the case, no .... Not a single word is mentioned, but in the same time the ex CEO of ASML went to Taiwan a couple of time for this very topic, no ... no result, the chance they really ordered any meaningful qty High NA EUV machine is kinda of small.

As the topic, focus on the topic, do you find any construction plan from TSMC and the Taiwanese government to House that new High NA EUV machine, Nope ..... So give me the proof. What is fake is always fake, don't come with fake news. As mentioned all the fab that TSMC building label as 2nm class i.e. all the way to A14 is low NA EUV, if you needed to have High NA EUV before 2035, there is at least a planning document submitted to the Taiwanese government for building, consultants is already employed and plan is currently been draw i.e. CAPEX is out, a MoU is signed with ASML to confirm the timing of availability, once construction plan is approved, that could be 6-12 months, real money needed to flow to ASML to confirm the slot, construction will be started, then is 3 years, i.e. the number of machine i.e. 10 estimate (vs what Intel, SK, Samsung, MU ordered) each of them needed at least 10 for meaningful production and ASML in a more realistic sense can produce 10 machine p.a. i.e. before 2030 there is not a chance that TSMC will have a machine then it take 6 months to set up the machine, then initial taping (1-3 months), the best is even they started i.e. all the docs submitted, it will still be 3-5 years away.

Since the machine is larger, Clean room needed to be redesign, normally, you needed water permit ... environmental report ... electricity planning (a lot of power needed to be use ...) it is really a state / central government level of work. And this can be slow. 2035 for High NA EUV implementation is the current forecast for TSMC to implement High NA EUV.
 
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although your article is behind the pay wall

The link that @clarkchang provided (https://www.taiwannews.com.tw/news/5965007) is not behind a paywall. I suspect your local Internet provider may be filtering it because the URL contains the word "taiwan." Please use a VPN and select a gateway in Japan, South Korea, Singapore, the United States, Canada, the United Kingdom, France, or another region to access it.

It has long been ASML’s strict policy not to disclose orders or order sizes for individual customers; only the customers themselves may reveal such information if they choose to. Both Intel and TSMC have publicly confirmed that they purchased and installed High‑NA EUV tools for R&D purposes.

I also think the high cost may have contributed to Intel CEO Li‑Bu Tan’s statement that Intel’s 14A node must secure external customers to be viable.
 
The link that @clarkchang provided (https://www.taiwannews.com.tw/news/5965007) is not behind a paywall. I suspect your local Internet provider may be filtering it because the URL contains the word "taiwan." Please use a VPN and select a gateway in Japan, South Korea, Singapore, the United States, Canada, the United Kingdom, France, or another region to access it.

It has long been ASML’s strict policy not to disclose orders or order sizes for individual customers; only the customers themselves may reveal such information if they choose to. Both Intel and TSMC have publicly confirmed that they purchased and installed High‑NA EUV tools for R&D purposes.

I also think the high cost may have contributed to Intel CEO Li‑Bu Tan’s statement that Intel’s 14A node must secure external customers to be viable.
Still do not change the fact

"TSMC will install the new equipment at its R&D center near its headquarters in Hsinchu in Q4, sources familiar with the matter said."

Will install, no anywhere on line used is installed, will is the key, back in whether timeline, Toyota will commercialize Solid State Battery on its vehicle in 2 years, guess what nothing happen, the Nature magazine mentioned that Nuclear Fusion will be available in the next 10 years, that is always the next 10, 2, Q4.....

The fact that it use the term "install" in this context is wrong, because high NA EUV machine is not install it is assemble unlike low na euv, there the machine is install as that was assemble in Holland, but high na skip that and assemble on site from parts all over the world, the fact TSMC say that just show a lack of reality.

Consultant, government official, employee, ASML, logistic company ..... etc etc .... so many people out that not a single leak, .... very very unlikely, the fact is that there is not yet a concrete plan to purchase these machine, it is on the strategy level and nothing in the execute stage.

Maybe is my company firewall, I am currently an Australian, IP is from Sydney
 
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Don't miss understood will be installed vs installed, although your article is behind the pay wall, I search for this topic for months, all is will be, Search the Chinese and English source, not consistent, but for one thing I am sure, as a person living as South African for 10s of years, I can assure you that the Dutch people will come out and said ASML has sell EUV High NA machine to TSMC if that is ever the case, no .... Not a single word is mentioned, but in the same time the ex CEO of ASML went to Taiwan a couple of time for this very topic, no ... no result, the chance they really ordered any meaningful qty High NA EUV machine is kinda of small.

As the topic, focus on the topic, do you find any construction plan from TSMC and the Taiwanese government to House that new High NA EUV machine, Nope ..... So give me the proof. What is fake is always fake, don't come with fake news. As mentioned all the fab that TSMC building label as 2nm class i.e. all the way to A14 is low NA EUV, if you needed to have High NA EUV before 2035, there is at least a planning document submitted to the Taiwanese government for building, consultants is already employed and plan is currently been draw i.e. CAPEX is out, a MoU is signed with ASML to confirm the timing of availability, once construction plan is approved, that could be 6-12 months, real money needed to flow to ASML to confirm the slot, construction will be started, then is 3 years, i.e. the number of machine i.e. 10 estimate (vs what Intel, SK, Samsung, MU ordered) each of them needed at least 10 for meaningful production and ASML in a more realistic sense can produce 10 machine p.a. i.e. before 2030 there is not a chance that TSMC will have a machine then it take 6 months to set up the machine, then initial taping (1-3 months), the best is even they started i.e. all the docs submitted, it will still be 3-5 years away.

Since the machine is larger, Clean room needed to be redesign, normally, you needed water permit ... environmental report ... electricity planning (a lot of power needed to be use ...) it is really a state / central government level of work. And this can be slow. 2035 for High NA EUV implementation is the current forecast for TSMC to implement High NA EUV.
ok.... one thing I can confirmed is that you are totally wrong about tsmc. and you are right, I can't prove there are two HNA running in tsmc today. Have a nice day :)
 
"TSMC will install the new equipment at its R&D center near its headquarters in Hsinchu in Q4, sources familiar with the matter said."

Will install, no anywhere on line used is installed, will is the key, back in whether timeline, Toyota will commercialize Solid State Battery on its vehicle in 2 years, guess what nothing happen, the Nature magazine mentioned that Nuclear Fusion will be available in the next 10 years, that is always the next 10, 2, Q4.....

The article @clarkchang shared about TSMC acquiring a High NA EUV tool was published in November 2024. By June 2026, eighteen months later, TSMC CEO C. C. Wei said the company is working to improve the tool’s throughput, indicating that TSMC has already installed at least one High‑NA EUV system.

A High‑NA EUV tool costs roughly US$400 million, and the total expense, including facilities, cleanroom preparation, training, testing, service contracts, and depreciation/amortization, can approach US$1 billion. TSMC would not leave such a machine in storage. It would be installed and in use.

The fact that it use the term "install" in this context is wrong, because high NA EUV machine is not install it is assemble unlike low na euv, there the machine is install as that was assemble in Holland, but high na skip that and assemble on site from parts all over the world, the fact TSMC say that just show a lack of reality.

I don’t think we need to be overly picky about whether to say ‘install’ or ‘assemble’ when bringing a High NA EUV machine online. Even Intel itself uses the term "installation" or "Installed" in its official news releases, SEC filings, and social posts. For example:


"Installation is complete and calibration started on Intel's High Numerical Aperture Extreme Ultraviolet lithography tool in a clean room at Intel Corporation's Fab D1X in Hillsboro, Oregon, in April 2024. "
Source: https://newsroom.intel.com/intel-foundry/intel-foundry-opens-new-frontier-chipmaking

"Scaling with Confidence: First TWINSCAN EXE:5200B High NA EUV Installed"
Source: https://community.intel.com/t5/Blog...V-and-Transistor-R-D-Are-Shaping/post/1730050
 
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The article @clarkchang shared about TSMC acquiring a High NA EUV tool was published in November 2024. By June 2026, eighteen months later, TSMC CEO C. C. Wei said the company is working to improve the tool’s throughput, indicating that TSMC has already installed at least one High‑NA EUV system.

A High‑NA EUV tool costs roughly US$400 million, and the total expense, including facilities, cleanroom preparation, training, testing, service contracts, and depreciation, can approach US$1 billion. TSMC would not leave such a machine in storage. It would be installed and in use.



I don’t think we need to be overly picky about whether to say ‘install’ or ‘assemble’ when bringing a High NA EUV machine online. Even Intel itself uses the term "installation" or "Installed" in its official news releases, SEC filings, and social posts. For example:


"Installation is complete and calibration started on Intel's High Numerical Aperture Extreme Ultraviolet lithography tool in a clean room at Intel Corporation's Fab D1X in Hillsboro, Oregon, in April 2024. "
Source: https://newsroom.intel.com/intel-foundry/intel-foundry-opens-new-frontier-chipmaking

"Scaling with Confidence: First TWINSCAN EXE:5200B High NA EUV Installed"
Source: https://community.intel.com/t5/Blog...V-and-Transistor-R-D-Are-Shaping/post/1730050
BTW, found few other media link talking about HNA delivered in 2024. enjoy it!

https://asia.nikkei.com/business/te...ceive-asml-s-next-gen-chip-machines-this-year
https://www.storm.mg/article/5266441
https://technews.tw/2024/11/18/tsmc-actively-deploys-and-develops-high-na-euv-process/
 
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