Siemens Wins Best in Show Award at Chiplet Summit and Targets Broad 3D IC Design Enablement

The recent Chiplet Summit in Santa Clara was buzzing with new designs and new design methods. It felt like the industry had turned a corner at this year’s event with lots of new technology and design success on display. Siemens EDA had a large presence at the show and took home the Best in Show Award for Packaging Design. There were a lot of companies at the show but only three Best in Show Awards. This accomplishment is significant. I spent some time chatting with a long-time friend at the show to get some of the backstory on what’s next.

The information was quite exciting – the best is yet to come. Let’s examine how Siemens wins Best in Show Award at Chiplet Summit and targets broad 3D IC design enablement.

The Award

Siemens won in the Packaging: Design category for its Innovator3D IC™ solution. The other two Best in Show awards were for Packaging: Hardware and Connectivity and Interoperability. Chuck Sobey, general chair of this year’s Chiplet Summit provided some comments. “Siemens’ Innovator3D IC stands out for its combination of design lifecycle coverage and breadth of industry-standard data models. As multi-die integration grows more complex, this solution gives designers the tools to move faster and innovate with confidence. We congratulate Siemens EDA on this well-deserved recognition.”

AJ Incorvaia, senior vice president of Electronic Board Systems, Siemens Digital Industries Software also commented. “The recognition of Innovator3D IC at Chiplet Summit reinforces our mission to deliver cutting edges technologies that radically accelerate how our customers are developing the next generation semiconductors. With Innovator3D IC, we are delivering a true system-level design approach where heterogeneous dies, chiplets, interposers and packages are optimized and validated within a single unified flow.”

This is an impressive achievement. While at the show I did some digging to find out more.

What’s Next

I was able to spend some time at the show with Tony Mastroianni, senior director of 3D IC Solutions Engineering at Siemens EDA. I have some great memories working with Tony that go all the way back to RCA Solid State in Somerville, New Jersey.

Later, I worked with Tony as he pioneered advanced package design at eSilicon Corporation. Tony has quite a broad background in chip and advanced package design with additional work in analog design at Silicon Compiler Systems, and design and consulting work at Mentor Graphics and ASIC Alliance Corp. After eSilicon was acquired by Inphi, Tony once again focused on advanced packaging there before joining Siemens EDA over five years ago.

Tony pointed out that the challenge in front of us is not an advanced packaging problem. Rather it’s a massive system design problem. One that must integrate chiplets using advanced packaging technology to deliver next generation products based on a 3D IC approach. Innovation in materials will be important here. Tony mentioned the move to organic interposers. This change will lift the reticle size limit that silicon interposers have. He envisioned 2 X 3-foot rack size interposer panels that will replace PCB boards and integrate ~1,000 chiplets.

To tame a problem of this size requires a substantial focus on integrating many tools to deliver complete solutions to address the various phases of 3D IC design. This is what Tony is working on with a team of senior architects and a substantial group of engineers to build and test solutions. This group is not part of any product team, so it delivers a central engineering function to build and test complete solutions. If enhancements are needed at the tool level this is done in collaboration with the product groups. I was impressed to hear this strategy. It is quite forward-looking.

There are several phases of design that must be integrated to form a complete solution. Juan Rey, senior VP and GM of Calibre and Siemens EDA CTO gave a keynote at the Chiplet Summit that provided a glimpse of what is coming. He talked about a heterogeneous 2.5/3D IC design process that includes:

Design planning and prototyping:  with system design/modeling, HW/SW, PCB, and system in package (SIP) partitioning, planning, and optimization, including thermal analysis and signal integrity/power integrity (SI/PI) planning.

Design implementation: including design/verification for the system and chiplet RTL. HW/SW co-simulation/validation and hardware design start here, as does substrate and interposer design/verification. So does SIP thermal, stress, SI/PI and static timing analysis (STA) analysis as well as chiplet physical design and verification. SIP DFT design and verification and chiplet DFT design and verification also start here.

Verification and signoff: continues many of the previous tasks and adds SIP and chiplet test program development.

Prototype manufacturing, bring-up and release to manufacturing: adds validation/bring-up, interposer and substrate manufacturing, package assembly, chiplet manufacturing, SIP final test and characterization/qualification.

Juan also discussed how Siemens applies AI to improve 3D IC design productivity. Machine learning, reinforcement learning, generative, and emerging agentic AI capabilities are integrated across the end-to-end design flow, enabling faster optimization, broader design space exploration, and more efficient convergence on optimal system-level PPA.

This is a high-level overview. There are many more tasks involved but you get the idea. This process is quite a bit more complex than monolithic chip design and building integrated capabilities that work together is what Jaun was describing and what Tony and the team are working on.

We touched on many other additions to the design process, including more prevalent use of fiber optic communication to increase speed and reduce power. Integrated photonics and backside power delivery are two game-changing additions to manage performance and power.

My conversation with Tony opened many new areas where Siemens can have a significant impact on 3D IC design. I expect there will be more announcements coming from this work. I will be watching for it.

To Learn More

If 3D IC is in your future, Siemens EDA has a lot to offer. You can learn more about how Siemens Digital Industries Software is enabling 3D IC design here.  And that’s how Siemens wins Best in Show Award at Chiplet Summit and targets broad 3D IC design enablement.