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TSMC Financial Status Plus OIP Update!

TSMC Financial Status Plus OIP Update!
by Daniel Nenni on 07-05-2011 at 8:00 am

Interesting notes from my most recent Taiwan trip: Taiwan unemployment is at a record low. Scooters once again fill the streets of Hsinchu! TSMC will be passing out record bonuses to a record amount of people. TSMC Fab expansions are ahead of schedule. The new Fab 15 in Taichung went up amazingly fast with equipment moving in later… Read More


GlobalFoundries Production-Ready @ 28nm in Multiple Locations!

GlobalFoundries Production-Ready @ 28nm in Multiple Locations!
by Daniel Nenni on 06-15-2011 at 11:02 am

GLOBALFOUNDRIES showed off its 28nm design ecosystem at #48DAC last week in San Diego. The company featured a full design ecosystem for its 28nm High-k Metal Gate (HKMG) technology, including silicon-validated flows, process design kits (PDKs), design-for-manufacturing (DFM), and intellectual property (IP) in partnership… Read More


A Birds-Eye Overview of DRC+

A Birds-Eye Overview of DRC+
by Daniel Nenni on 06-13-2011 at 10:57 pm

The GlobalFoundries DRC+ platform is one of the most innovative DFM technologies and was well represented at #48DAC. In case you missed it, here is a reprint of a DRC+ overview from GFI just prior to #48DAC:

DRC (Design Rule Constraints) are the fundamental principles in constraining VLSI (Very Large Scale Integration) circuit… Read More


Magma, ARM, GLOBALFOUNDRIES

Magma, ARM, GLOBALFOUNDRIES
by Daniel Payne on 06-06-2011 at 11:07 am

Introduction
Monday morning at DAC I attended the breakfast presentation from Magma, ARM and GLOBALFOUNDRIES. The 28nm node is ready for business using Magma tools and ARM libraries.

During breakfast I met Karim Arabi, Ph.D. from QualComm. He’s a senior director of engineering in San Diego and wanted to learn more about… Read More


GLOBALFOUNDRIES 28nm Design Ecosystem!

GLOBALFOUNDRIES 28nm Design Ecosystem!
by Daniel Nenni on 06-01-2011 at 11:00 am

GLOBALFOUNDRIES will show off its 28nm design ecosystem at #48DAC next week in San Diego. The company will feature a full design ecosystem for its 28nm High-k Metal Gate (HKMG) technology, including silicon-validated flows, process design kits (PDKs), design-for-manufacturing (DFM), and intellectual property (IP) in partnership… Read More


37 Billion IC with MTP IP from now to 2015: clearly, Kilopass and GlobalFoundries partnership make sense…

37 Billion IC with MTP IP from now to 2015: clearly, Kilopass and GlobalFoundries partnership make sense…
by Eric Esteve on 05-02-2011 at 4:42 am

Although there has been always a strong relationship between Kilopass and Chartered Semiconductor, this relationship has been even enhanced after the acquisition of Chartered by GLOBALFOUNDRIES, allowing Kilopass’s customers to integrate NVM IP on advanced technology nodes, down to 40nm or even 28nm in the near future.







BeforeRead More


AMD and GlobalFoundries / TI and UMC

AMD and GlobalFoundries / TI and UMC
by Daniel Nenni on 04-11-2011 at 11:38 am

There have been some significant foundry announcements recently that if collated will give you a glimpse into the future of the semiconductor industry. So let me do that for you here.

First the candid EETimes article about TI dumping Samsung as a foundry:

Taiwan’s UMC will take the ”lead role’’ in making the OMAP 5 device onRead More


ARM and GlobalFoundries

ARM and GlobalFoundries
by Eric Esteve on 03-25-2011 at 9:49 am


Although there has been always a strong relationship between ARM and GlobalFoundries, it is interesting to notice that Intel has helped to boost it and make it even stronger. Indeed when AMD renegotiated its x86 licensing deal with Intel in 2009, one of the most significant long-term changes was a marked reduction in how much of
Read More


Process Design Kits: PDKs, iPDKs, openPDKs

Process Design Kits: PDKs, iPDKs, openPDKs
by Paul McLellan on 03-24-2011 at 5:28 pm

One of the first things that needs to be created when bringing up a new process is the Process Design Kit, or PDK. Years ago, back when I was running the custom IC business line at Cadence, we had a dominant position with the Virtuoso layout editor and so creating a PDK really meant creating a Virtuoso PDK, and it was a fairly straightforward… Read More


DRC+, DFM, CMP, Variablility

DRC+, DFM, CMP, Variablility
by Daniel Payne on 02-10-2011 at 12:42 pm

When I worked at Intel as a circuit design engineer I could talk directly with the technology development engineers to understand how to really push my DRAM designs and get the smallest possible memory cell layout that would still yield well, provide fast access time, and long refresh cycles.

(United States Patent 6661699. Inventor:… Read More