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Axiomise pioneered the adoption of formal verification in the semiconductor industry since 2017. Led by visionary CEO, Dr. Ashish Darbari, who has 63 patents in formal verification, and Neil Dunlop an industry veteran with 40 years of experience, Axiomise has helped twenty customers over the last six years by providing them… Read More
Multi-die system design is clearly gaining momentum. Part of this momentum focuses on chiplets and a chiplet ecosystem. A “building block” approach for design will work better if there is a way to get verified, quality building blocks in the form of chiplets. The recent Chiplet Summit became an epicenter for this topic. The conference… Read More
Jay Dawani is the co-founder and CEO at Lemurian Labs, a startup developing an accelerated computing platform tailored specifically for AI applications. The platform breaks through the hardware barriers to make AI development faster, cheaper, more sustainable, and accessible to more than just a few companies.
Prior to founding… Read More
– KLAC reported an OK QTR & flat guide-waiting for 2025 recovery?
– China exposure remains both risk & savior & big in backlog
– Wafer inspect strong- Patterning on long slide- PCB biz for sale
– Some bright spots but memory still weak- Foundry/Logic OK
– Lam reported as expected and guided flat- No recovery yet
– Some mix shifts but China still 40% (8X US at 5%)-NVM still low
– HBM is promising but Lam needs a broad memory recovery
– Lam has not seen order surge ASML saw- Likely lagging by 3-4 QTRs
As compared… Read More
– ASML orders more than triple sequentially- Utilization increases
– Management remains conservative with flat revenues 2024 vs 2023
– Recovery will be slow, targeting 2025- Long & weak cyclical bottom
– Litho orders are leading indicator of future wider recovery
This is our third year working with Sondrel and it has been a great experience. I have always been fascinated with the ASIC business and put a full chapter about it in our first book “Fabless: The Transformation of the Semiconductor industry.” Companies like Sondrel enabled our move to the fabless model and now they … Read More
At IEDM 2023, Naoto Horiguchi presented on CFETs and Middle of Line integration. I had a chance to speak with Naoto about this work and this write up is based on his presentation at IEDM and our follow up discussion. I always enjoy talking to Naoto, he is one of the leaders in logic technology development, explains the technology in … Read More
Renie Ananthakumar, Principal Engineer at TenXer Labs., invites System Design Engineers globally to a webinar that’s all about practical insights—From Bench to Board: A Comprehensive Guide to DC-DC Converter Selection and Remote Testing.
In this session, we are breaking down the complexity of DC-DC… Read More
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MediaTek Develops Chip Utilizing TSMC’s 2nm Process, Achieving Milestones in Performance and Power Efficiency