Banner Electrical Verification The invisible bottleneck in IC design updated 1
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Ansys Revving up for Automotive and 3D-IC Multiphysics Signoff at DAC 2023

Ansys Revving up for Automotive and 3D-IC Multiphysics Signoff at DAC 2023
by Daniel Nenni on 06-26-2023 at 10:00 am

dac 2023 600x100

 

Highlights:

  • Ansys CTO Prith Banerjee will be delivering the Visionary Speaker opening address on Tuesday 11th
  • There will be technical presentations every hour in the Ansys Booth Theater (#1539)
  • Get yourself a complimentary sit-down breakfast and a discussion on automotive electronics by registering for the Ansys DAC
Read More

Assessing EUV Wafer Output: 2019-2022

Assessing EUV Wafer Output: 2019-2022
by Fred Chen on 06-26-2023 at 6:00 am

Assessing EUV Wafer Output 2019 2022

At the 2023 SPIE Advanced Lithography and Patterning conference, ASML presented an update on its EUV lithography systems in the field [1]. The EUV wafer exposure output was presented and is shown below in table form:

From this information, we can attempt to extract and assess the EUV wafer output per quarter. First, since there … Read More


Efabless Celebrates AI Design Challenge Winners!

Efabless Celebrates AI Design Challenge Winners!
by Daniel Nenni on 06-23-2023 at 6:00 am

Efabless AI Challenge SemiWiki

The first AI Generated Open-Source Silicon Design Challenge invited participants to use generative AI to design an open-source silicon chip and tape it out in just three weeks. The contestants were required to create Verilog code from natural language prompts, and then implemented their designs using the chipIgnite platform… Read More


Intel Internal Foundry Model Webinar

Intel Internal Foundry Model Webinar
by Scotten Jones on 06-21-2023 at 12:00 pm

IAO Investor Webinar Slides to post on our INTC website PDF Page 07

Intel held a webinar today to discuss their IDM2.0 internal foundry model. On the call were Dave Zinsner Executive Vice President and Chief Financial Officer and Jason Grebe Corporate Vice President and General Manager of the Corporate Planning Group.

On a humorous note, the person moderating the attendee questions sounded … Read More


Keynote Sneak Peek: Ansys CEO Ajei Gopal at Samsung SAFE Forum 2023

Keynote Sneak Peek: Ansys CEO Ajei Gopal at Samsung SAFE Forum 2023
by Daniel Nenni on 06-19-2023 at 10:00 am

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As one of the world’s leading chip foundries, Samsung occupies a vital position in the semiconductor value chain. The annual Samsung Advanced Foundry Ecosystem (SAFE™) Forum is a must-go event for semiconductor and electronic design automation (EDA) professionals. Ajei Gopal, President and CEO of Ansys, has the honor of delivering… Read More


WEBINAR: Revolutionizing Chip Design with 2.5D/3D-IC Design Technology

WEBINAR: Revolutionizing Chip Design with 2.5D/3D-IC Design Technology
by Daniel Nenni on 06-12-2023 at 10:00 am

Figure 1 (2)

In the 3D-IC (Three-dimensional integrated circuit) chip design method, chiplets or wafers are stacked vertically on top of each other and are connected using Through Silicon Vias (TSVs) or hybrid bonding.

The 2.5D-IC design method places multiple chiplets alongside each other on a silicon interposer. Microbumps and interconnect… Read More


VLSI Symposium – Intel PowerVia Technology

VLSI Symposium – Intel PowerVia Technology
by Scotten Jones on 06-12-2023 at 6:00 am

Slide4

At the 2023 VLSI Symposium on Technology and Circuits, Intel presented two papers on their PowerVia technology. We received a pre-conference briefing on the technology embargoed until the conference began and received the papers.

Traditionally all interconnects have taken place on the front side of devices with signal and … Read More


Nominations for Phil Kaufman Award, Phil Kaufman Hall of Fame Close June 30

Nominations for Phil Kaufman Award, Phil Kaufman Hall of Fame Close June 30
by Paul Cohen on 06-07-2023 at 10:00 am

PK Generic

Plan ahead now because Friday, June 30, is the deadline to submit nominations for the Phil Kaufman Award and the Phil Kaufman Hall of Fame for anyone you think is deserving of these honors. If you haven’t given it any thought, please consider nominating someone.

Before we look at both and the nomination requirements, here’s a thumbnail… Read More


PCI-SIG DevCon and Where Samtec Fits

PCI-SIG DevCon and Where Samtec Fits
by Mike Gianfagna on 06-07-2023 at 6:00 am

PCI SIG DevCon and Where Samtec Fits

PCIe (peripheral component interconnect express) is an interface standard for connecting high-speed components contained in PCs, MACs and other types of processors. Think graphics, storage arrays, Wi-Fi and the like. This communication standard has become incredibly popular. The first version of the standard was released… Read More


TSMC Clarified CAPEX and Revenue for 2023!

TSMC Clarified CAPEX and Revenue for 2023!
by Daniel Nenni on 06-06-2023 at 2:00 pm

TSMC HQ Taiwan

TSMC clarified CAPEX and revenue for 2023 last night at the Annual Shareholders Meeting. Last year TSMC guided up during this meeting but this year they guided down. CAPEX was guided down to the lower end of $36B-$32B.  Revenue was guided down from low-single to mid-single digit so maybe down another percent or two. The TSMC Jan… Read More