Semiconductors sit at the heart of the electronics revolution, and the scaling enabled by Moore’s law has had a transformational impact on electronics as well as society. Traditionally, the relationship between semiconductor companies and their customers has been a function of the volume driven by the customer. In very … Read More
Electronic Design Automation
Balancing Analog Layout Parasitics in MOSFET Differential Pairs
This article is an abstract of Paul Clewes’ webinar you can find here.
Differential amplifiers apply gain not to one input signal but to the difference between two input signals. This means that a differential amplifier naturally eliminates noise or interference that is present in both input signals. Differential amplification… Read More
STOP Writing RTL for Registers
After almost three decades in the EDA business, it is beyond my comprehension to understand why chip designers still hand-write RTL for complex register maps – chip designs with hundreds of registers and thousands of register fields. In today’s silicon world where software is the key to chip-based product success, it is the register… Read More
The CHIPS and Science Act, Cybersecurity, and Semiconductor Manufacturing
This year is proving to be a momentous one for U.S. semiconductor manufacturing. During a global chip shortage and record inflation, President Biden signed into effect the CHIPS and Science Act – which so far is the greatest boon to U.S. semiconductor manufacturing in history, with $52 billion in subsidies for chip manufacturers… Read More
Podcast EP112: How Cadence is Revolutionizing Full-Chip Signoff with Certus
Dan is joined by Brandon Bautz, Sr. Group Director of Product Management, responsible for the Cadence silicon signoff and verification product lines in the Digital & Signoff Group.
Dan and Brandon explore the substantial challenges faced by design teams needing to perform full-chip signoff at an accelerated pace for advanced… Read More
Measuring Success in Semiconductor Design Optimization: What Metrics Matter?
When it comes to electronic design automation (EDA), there are two aspects to this technologically challenging and highly competitive field. First, there is the task of designing very complex chips for which a full suite of various software tools are needed. Then there is the task of managing extremely complex EDA workflows and… Read More
The Increasing Gaps in PLM Systems with Handling Electronics
Product LifeCycle Management (PLM) systems have shown incredible value for integrating the enterprise with a single view of the product design, deployment, maintenance, and end-of-life processes. PLM systems have traditionally grown from the mechanical design space, and this still forms their strength.
Meanwhile, due… Read More
DFT Moves up to 2.5D and 3D IC
The annual ITC event was held the last week of September, and I kept reading all of the news highlights from the EDA vendors, as the time spent on the tester can be a major cost and the value to catching defective chips from reaching production is so critical. Chiplets, 2.5D and 3D IC design have caught the attention of the test world, … Read More
Siemens EDA Discuss Permanent and Transient Faults
This is a topic worth coverage for those of us who aim to know more about safety. There are devils in the details on how ISO 26262 quantifies fault metrics, where I consider my understanding probably similar to other non-experts: light. All in all, a nice summary of the topic.
Permanent and transient faults 101
The authors kick off … Read More
Analyzing Clocks at 7nm and Smaller Nodes
In the good old days the clock signal looked like a square wave , and had a voltage swing of 5 volts, however with 7nm technology the clock signals can now look more like a sawtooth signal and may not actually reach the full Vdd value of 0.65V inside the core of a chip. I’ll cover some of the semiconductor market trends, and then challenges… Read More


AI Bubble?