From my vantage point in the EDA foxhole it can be easy to forget that Cadence also has interests in much broader technology domains. One of these is in data center modeling and optimization, through their Cadence Reality Digital Twin Platform. This is an area in which they already have significant track record collaborating with… Read More
Artificial Intelligence
Designing and Simulating Next Generation Data Centers and AI Factories
At NVIDIA’s recent GTC conference, a Cadence-NVIDIA joint session provided insights into how AI-powered innovation is reshaping the future of data center infrastructure. Led by Kourosh Nemati, Senior Data Center Cooling and Infrastructure Engineer from NVIDIA and Sherman Ikemoto, Sales Development Group Director from … Read More
CEO Interview with Dr. Michael Förtsch of Q.ANT
Dr. Michael Förtsch, CEO of Q.ANT, is a physicist and innovator driving advancements in photonic computing and sensing technologies. With a PhD from the Max Planck Institute for the Science of Light, he leads Q.ANT’s development of Thin-Film Lithium Niobate (TFLN) technology, delivering groundbreaking energy efficiency … Read More
How Cadence is Building the Physical Infrastructure of the AI Era
At the 2025 NVIDIA GTC Conference, CEO Jensen Huang delivered a sweeping keynote that painted the future of computing in bold strokes: a world powered by AI factories, built on accelerated computing, and driven by agentic, embodied AI capable of interacting with the physical world. He introduced the concept of Physical AI—intelligence… Read More
Achieving Seamless 1.6 Tbps Interoperability for High BW HPC AI/ML SoCs: A Technical Webinar with Samtec and Synopsys
HPC Bandwidth Explosion and 1.6T Ecosystem Interop Need
The exponential growth in data bandwidth requirements driven by HPC systems, AI, and ML applications has set the stage for an ever-increasing need for 1.6Tbps Ethernet. As data centers strive to manage vast data transfers with maximum efficiency, the urgency for interoperability… Read More
A Perspective on AI Opportunities in Software Engineering
Whatever software engineering teams are considering around leveraging AI in their development cycles should be of interest to us in hardware engineering. Not in every respect perhaps but there should be significant commonalities. I found a recent paper on the Future of AI-Driven Software Engineering from the University of … Read More
SNUG 2025: A Watershed Moment for EDA – Part 1
Hot on the heels of DVConUS 2025, the 35th annual Synopsys User Group (SNUG) Conference made its mark as a defining moment in the evolution of Synopsys—and the broader electronic design automation (EDA) industry. This year’s milestone event not only underscored Synopsys’ continued innovation but also affirmed the vision… Read More
Balancing the Demands of OTP for Advanced Nodes with Synopsys IP
One-time programmable (OTP) non-volatile memory has been around for a long time. Compared to other non-volatile memory technologies OTP has a smaller footprint and does not require additional manufacturing steps, making it a popular choice to store items such as boot code and encryption keys. While this sounds simple, the growth… Read More
Synopsys Executive Forum: Driving Silicon and Systems Engineering Innovation
The annual SNUG (Synopsys Users Group) conference, now in its 35th year, once again brought together key stakeholders to showcase accomplishments, discuss challenges, and explore opportunities within the semiconductor and electronics industry. With approximately 2,500 attendees, SNUG 2025 served as a dynamic hub for collaboration… Read More
A Synopsys Webinar Detailing IP Requirements for Advanced AI Chips
Generative AI is dramatically changing the compute power that must be delivered by advanced designs. This demand has risen by more than 10,000 times in the past five to six years. This increased demand has impacted the entire SoC design flow. We are now faced with going beyond 1 trillion transistors per chip, and systems now consist… Read More
RISC-V Virtualization and the Complexity of MMUs