Every family has that one wedding where, halfway through the toasts, someone leans over and whispers “wait, who’s paying for all this?” This is that wedding. OpenAI and Broadcom are the happy couple. Apollo Global Management walked the bride down the aisle. Nvidia may have just stood up to offer a toast, a very… Read More
Artificial Intelligence
All-Embracing Multiphysics Analysis for Chiplet-Based Systems
What systems can accomplish by combining semiconductors, AI, and software seems at times boundless. Chiplet-based semiconductors deliver this promise, allowing a myriad of complex digital, memory, analog and photonic functions to be condensed into a single semiconductor package for higher performance, lower power consumption… Read More
How Samtec Blazes a Trail to 224/448 Gbps at DesignCon 26
I recently covered what Samtec was doing at DesignCon 26. Samtec has a tendency to dominate any show it attends in multiple dimensions. The prior post focused on the company’s contributions to the technical agenda and the high-profile experts in attendance. While all that is interesting and valuable, attending a large show like… Read More
Feed Forward Intelligence: Enabling Testability in the Chiplets Era
The semiconductor industry is entering a new era in which advanced packaging and chiplets-based architectures are becoming the primary drivers of system-level innovation. As traditional process-node scaling becomes increasingly complex and expensive, manufacturers are turning to heterogeneous integration, combining… Read More
A tower-like heterogeneous packaging architecture for the AI era
For years, advanced packaging has been described mostly in planar terms: chiplets placed side by side, connected through interposers, bridges, redistribution layers, substrates, and short-reach electrical links. This view remains important. It supports today’s GPU, HBM, chiplet, and 2.5D integration architectures.… Read More
Agentic AI and the Future of Chip Design: From Productivity Tool to Engineering Partner
Highlights from a recent panel session moderated by Ed Sperling (Semiconductor Engineering) featuring Walden Rhines (Silvaco), Vincent Wong (Verific), Dave Kelf (Breker Verification Systems), Shelly Henry (MooresLab AI), Ann Wu (Silimate), and Cindy Cui (ChipAgents). The panel session was hosted by Electronic System … Read More
WEBINAR: Engineering Documentation is a Critical Source of Truth – Do You Know if it’s Accurate?
Embedded systems programs rarely fail because of a lack of execution capability. They fail because critical engineering documentation drifts out of alignment over time and distance. Simply put, the team is correctly following the wrong instructions. This includes requirements, architecture, implementation, verification,… Read More
Disaggregating AI Compute to Break the Tokens Barrier
Among several topics dominating news streams these days, giant datacenters are a leading theme. They point to an AI-centric future while raising real concerns about sustainability and scalability. Certainly land, power and water demand are very present concerns for most of us, witness growing pushback against building new… Read More
Rambus Delivers Complete DDR5 Client Chipset for High-Speed CUDIMM and CSODIMM Memory Modules
The rapid emergence of AI-enabled personal computers is driving unprecedented demand for higher memory bandwidth, improved signal integrity and greater system reliability. To address these requirements, Rambus has introduced a complete client memory interface chipset for Clocked Unbuffered Dual In-Line Memory Modules… Read More
From Evidence to Authority: Bounded Gate Authority for Governed Semiconductor Realization
Advanced semiconductor systems are no longer limited by a single engineering domain. They are constrained by the convergence of many interdependent vectors: silicon nodes, advanced packaging architectures, substrate materials, platform PCBs, power-delivery networks, thermal behavior, manufacturing variation, firmware… Read More


The Packaging PDK Is the Missing Layer for Co-Packaged Optics