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Artificial Intelligence
Automated debugging – starting from an unexpected behavior to find a bug root-cause or a small set of possible root-causes – is a hot topic now that agentic systems are playing a bigger role in automation. Unsurprising since debug remains the most time and resource-consuming aspect of verification, in turn the most time/resource-consuming… Read More
Si2 is conducting quite a few sessions at DAC this year covering everything from power model standards to agentic AI. There is one session that is a bit different, focusing on LLM benchmarking. Since AI is popping up everywhere, the ability to accurately assess and measure the quality of new models becomes more important. That’s… Read More
When considering best-fit applications for RISC-V, the appeal of extending the instruction set and competitive pricing for storage and edge applications has been pretty clear. But I have always struggled to understand the appeal in head-on competition with Arm in premium applications such as servers and infrastructure systems.… Read More
As architects push toward advanced nodes and increasingly demanding workloads, modern silicon design has entered an era of unprecedented complexity. A single design respin can cost millions of dollars and delay market entry. Against this backdrop, designs must be balanced for performance, bandwidth, power efficiency, security… Read More
Madhulima Tewari is the CEO and founder of VerifAIX. After two decades building EDA tools, taping out chips, and working on distributed systems, cloud infrastructure, and enterprise AI applications, she teamed up with chip design and methodology leaders and university researchers to build an agentic AI system aimed at helping… Read More
On the latest investor call the big story was the increase in CAPEX for 2026 and the expected CAPEX for 2027. TSMC raised the CAPEX ceiling for 2026 from US$56 billion to US$64 billion. My guess would be US$64 billion will be spent if not more. We have been discussing this in the SemiWiki Forum and my guess for the 2027 TSMC CAPEX is an incredible… Read More
PCI Express (PCIe), PCIe switches, Time Division Multiplexing (TDM), Network Interface Cards (NICs), and SmartNICs are all well-established technologies that have formed the backbone of computing and networking systems for years. More recently, SuperNICs have emerged as the next generation of networking devices optimized… Read More
The semiconductor landscape is currently undergoing a structural transformation as the “Data-Centric Shift” moves the industry’s center of gravity from smartphones toward High-Performance Computing (HPC) and AI infrastructure.
This transition is clearly validated by TSMC’s 2025 filings, which show… Read More
Over the last year, the EDA industry has started using a new vocabulary: agents, super agents, mental models, native skills, playbooks, RAG, MCP, autonomous workflows, and AI-first design.
The language is new, but the motivation is familiar to anyone who has worked in chip design.
Design complexity keeps increasing. The number… Read More
Large design enterprises have multiple concurrent activities around IP of various types: software/firmware, blocks defined in RTL or HLS, verification IPs of multiple different types, physical implementations, scripts/files for timing, power management, etc., etc. Each of these continues to evolve and branch to serve … Read More
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ASML High-NA EUV is Not Ready for High-Volume Production