AI, hyperscale data centers, and data-intensive workloads are driving unprecedented demands for performance, bandwidth, and energy efficiency. As the economic returns of traditional transistor scaling diminish, advanced IC packaging and heterogeneous integration have become the primary levers for system-level scaling.… Read More
Where is Quantum Error Correction Headed Next?
I have written earlier in this series that quantum error correction (QEC), a concept parallel to ECC in classical computing, is a gating factor for production quantum computing (QC). Errors in QC accumulate much faster than in classical systems, requiring QEC methods that can fix errors fast enough to permit production applications.… Read More
TSMC based 3D Chips: Socionext Achieves Two Successful Tape-Outs in Just Seven Months!
Socionext’s recent run of rapid 3D-IC tape-outs is a noteworthy milestone for the industry with two successful tape-outs in just seven months for complex, multi-die designs aimed at AI and HPC workloads. That pace of iteration highlights how advanced packaging, richer EDA toolchains, and closer foundry-ecosystem collaboration… Read More
Podcast EP324: How Dassault Systèmes is Creating the Next Generation of Semiconductor Design and Manufacturing with John Maculley
Daniel is joined by John Maculley, Global High-Tech Industry Strategy Consultant at Dassault Systèmes. John has over 20 years of experience advancing innovation across the semiconductor and electronics sectors. Based in Silicon Valley, he works with leading foundries, OSATs, design houses, and research institutes worldwide… Read More
Podcast EP323: How to Address the Challenges of 3DIC Design with John Ferguson
Daniel is joined by John Ferguson, senior director of product management for the Calibre products in the 3DIC space at Siemens EDA. He manages the vision and product offerings in the Calibre domain for 3DIC design solutions.
Dan explores the challenges of 3DIC and chiplet-based design with John, who describes the broad range of… Read More
Quantum Computing Technologies and Challenges
There’s more than one way to build a quantum computer (QC) though it took me a while to find a good reference. I finally settled on Building Quantum Computers: A Practical Introduction. Excellent book but designed only for those who will enjoy lots of quantum math. I’m going to spare you that and instead describe a couple of the more… Read More
3D ESD verification: Tackling new challenges in advanced IC design
By Dina Medhat
Three key takeaways
- 3D ICs require fundamentally new ESD verification strategies. Traditional 2D approaches cannot address the complexity and unique connections in stacked-die architectures.
- Classifying external and internal IOs is essential for robust and cost-efficient ESD protection. Proper differentiation
MZ Technologies Launches Advanced Packaging Design Video Series
In a significant move aimed at empowering semiconductor and systems-design engineers, MZ Technologies has announced the launch of a new video series focused on advanced packaging design. This initiative comes at a time when the semiconductor industry is rapidly shifting toward multi-die, 2.5D/3D integration, heterogeneous… Read More
Hierarchically defining bump and pin regions overcomes 3D IC complexity
By Todd Burkholder and Per Viklund, Siemens EDA
The landscape of advanced IC packaging is rapidly evolving, driven by the imperative to support innovation on increasingly complex and high-capacity products. The broad industry trend toward heterogeneous integration of diverse die and chiplets into advanced semiconductor… Read More
Chiplets: Powering the Next Generation of AI Systems
AI’s rapid expansion is reshaping semiconductor design. The compute and I/O needs of modern AI workloads have outgrown what traditional SoC scaling can deliver. As monolithic dies approach reticle limits, yields drop and costs rise, while analog and I/O circuits gain little from moving to advanced process nodes. To sustain … Read More


AI Bubble?