Engineered substrate technology is driving an evolution within the semiconductor industry. As Moore’s Law reaches its limits, the focus is shifting from traditional planar wafer scaling to innovative material engineering and 3D integration. Companies like Soitec, Intel and Samsung are pioneering this transition, unlocking… Read More
Synopsys Expands Hardware-Assisted Verification Portfolio to Address Growing Chip Complexity
Last week, Synopsys announced an expansion of their Hardware-Assisted Verification (HAV) portfolio to accelerate semiconductor design innovations. These advancements are designed to meet the increasing demands of semiconductor complexity, enabling faster and more efficient verification across software and hardware… Read More
Outlook 2025 with David Hwang of Alchip
Dave Hwang joined Alchip in 2021 as General Manager of Alchip’s North America Business Unit. He also serves as Senior Vice President, Business Development. Prior to join Alchip, Dave served as Vice President, Worldwide Sales and Marketing for Global Unichip and in a variety of management and technical roles at TSMC. He holds… Read More
2025 Outlook Anna Fontanelli MZ Technologies
Anna Fontanelli, CEO of MZ Technologies, is a silicon executive with more than 35 years of expertise in managing complex R&D organizations/programs to give birth to innovative EDA technologies. Strong communication skills and proven ability to lead distributed, cross functional teams in international environments.… Read More
Embracing the Chiplet Journey: The Shift to Chiplet-Based Architectures
The semiconductor industry is facing a paradigm shift. Traditional scaling, once driven by Moore’s Law, is slowing down. For years, moving to smaller process nodes led to lower transistor costs and better performance. However, scaling from node to node now offers fewer benefits as wafer costs rise much more than the historical… Read More
Chiplets-Based Systems: Keysight’s Role in Design, Testing, and Data Management
Keysight, with deep roots tracing back to Hewlett-Packard, has long been at the forefront of innovation in electronic design and testing. It manufactures electronics test and measurement equipment and software. The company also owns its own foundry and makes custom chips and packages for its instrumentation business. Many… Read More
What is Different About Synopsys’ Comprehensive, Scalable Solution for Fast Heterogeneous Integration
Multi-die design has become the center of a lot of conversation lately. The ability to integrate multiple heterogeneous devices into a single package has changed the semiconductor landscape, permanently. This technology has opened a path for continued Moore’s Law scaling at the system level. What comes next will truly be exciting.… Read More
Will 50% of New High Performance Computing (HPC) Chip Designs be Multi-Die in 2025?
Predictions in technology adoption often hinge on a delicate balance between technical feasibility and market dynamics. While business considerations play a pivotal role, the technical category reasons for the success or failure of a prediction are more tangible and often easier to identify—if scrutinized with care. However,… Read More
Heterogeneous 2D/3D Packaging Challenges
A growing trend in system design is the use of multiple ICs mounted in advanced packages, especially in high-performance computing and AI. These modern packages now integrate multiple ICs, often with high-bandwidth memory (HBM), resulting in hundreds of thousands of connections that need proper verification. Traditional… Read More
2025 Outlook with Larry Zu of Sarcina Technology
Tell us a little bit about yourself and your company.
I’m Larry Zu, Founder and CEO of Sarcina Technology. I’ve grown Sarcina from just designing packages for a few small companies to handling the entire post-silicon ecosystem, including package design, assembly, testing, qualification and production services for the top … Read More
Rethinking Multipatterning for 2nm Node