Synopsys Security Webinar 800x100 High Quality (2)
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Intel’s Foundry Transformation: Technology, Culture, and Collaboration

Intel’s Foundry Transformation: Technology, Culture, and Collaboration
by Kalar Rajendiran on 05-07-2025 at 10:00 am

Intel and UMC 2025

Intel’s historical dominance in semiconductor process technology began to erode around 2018, as competitors started delivering higher performance at smaller nodes. In response, Intel is now doubling down on innovation across two fronts: advanced process nodes such as Intel 18A and 14A, and cutting-edge packaging technologies.… Read More


Intel’s Path to Technological Leadership: Transforming Foundry Services and Embracing AI

Intel’s Path to Technological Leadership: Transforming Foundry Services and Embracing AI
by Kalar Rajendiran on 05-06-2025 at 10:00 am

Compressed Dont be encumbered by history

Intel, long a leader in semiconductor manufacturing, is on a determined journey to reclaim its technological leadership in the industry. After facing significant challenges in recent years, the company is making a concerted effort to adapt and innovate, with a clear focus on AI-driven technologies, advanced packaging solutions,… Read More


Scaling AI Infrastructure with Next-Gen Interconnects

Scaling AI Infrastructure with Next-Gen Interconnects
by Kalar Rajendiran on 04-29-2025 at 6:00 am

Data Centers Reimagined for Future of Gen AI

At the recent IPSoC Conference in Silicon Valley, Aparna Tarde gave a talk on the importance of Next-Gen Interconnects to scale AI infrastructure. Aparna is a Sr. Technical Product Manager at Synopsys. A synthesis of the salient points from her talk follows.

The rapid advancement of artificial intelligence (AI) is fundamentally… Read More


Siemens Describes its System-Level Prototyping and Planning Cockpit

Siemens Describes its System-Level Prototyping and Planning Cockpit
by Mike Gianfagna on 04-28-2025 at 10:00 am

Siemens Describes its System Level Prototyping and Planning Cockpit

We all know semiconductor design is getting harder. Much harder when you consider the demands of AI workloads and heterogeneous integration of many chiplets in a single package. This class of system demands co-optimization across the entire design flow. For example, functional verification, thermal analysis, signal and power… Read More


TSMC Brings Packaging Center Stage with Silicon

TSMC Brings Packaging Center Stage with Silicon
by Mike Gianfagna on 04-23-2025 at 11:45 am

TSMC Brings Packaging Center Stage with Silicon

The worldwide TSMC 2025 Technology Symposium recently kicked off with the first event in Santa Clara, California. These events typically focus on TSMC’s process technology and vast ecosystem. These items were certainly a focus for this year’s event as well. But there is now an additional item that shares the spotlight – packaging… Read More


SNUG 2025: A Watershed Moment for EDA – Part 1

SNUG 2025: A Watershed Moment for EDA – Part 1
by Lauro Rizzatti on 04-15-2025 at 6:00 am

SNUG 2025 A Watershed Moment for EDA Figure 1

Hot on the heels of DVConUS 2025, the 35th annual Synopsys User Group (SNUG) Conference made its mark as a defining moment in the evolution of Synopsys—and the broader electronic design automation (EDA) industry. This year’s milestone event not only underscored Synopsys’ continued innovation but also affirmed the vision… Read More


Synopsys Webinar: The Importance of Security in Multi-Die Designs – Navigating the Complex Landscape

Synopsys Webinar: The Importance of Security in Multi-Die Designs – Navigating the Complex Landscape
by Daniel Nenni on 04-11-2025 at 6:00 am

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In today’s rapidly evolving digital landscape, the security of electronic systems is of the highest priority. This importance is underscored by technological advancements and increasing regulatory demands. Multi-die designs which integrate multiple dies (also called chiplets) into a single package, introduce … Read More


Synopsys Executive Forum: Driving Silicon and Systems Engineering Innovation

Synopsys Executive Forum: Driving Silicon and Systems Engineering Innovation
by Kalar Rajendiran on 04-09-2025 at 10:00 am

Sassine Keynote (with Satya)

The annual SNUG (Synopsys Users Group) conference, now in its 35th year, once again brought together key stakeholders to showcase accomplishments, discuss challenges, and explore opportunities within the semiconductor and electronics industry. With approximately 2,500 attendees, SNUG 2025 served as a dynamic hub for collaboration… Read More


A Synopsys Webinar Detailing IP Requirements for Advanced AI Chips

A Synopsys Webinar Detailing IP Requirements for Advanced AI Chips
by Mike Gianfagna on 04-03-2025 at 10:00 am

A Synopsys Webinar Detailing IP Requirements for Advanced AI Chips

Generative AI is dramatically changing the compute power that must be delivered by advanced designs. This demand has risen by more than 10,000 times in the past five to six years.  This increased demand has impacted the entire SoC design flow. We are now faced with going beyond 1 trillion transistors per chip, and systems now consist… Read More


Powering the Future: How Engineered Substrates and Material Innovation Drive the Semiconductor Revolution

Powering the Future: How Engineered Substrates and Material Innovation Drive the Semiconductor Revolution
by Kalar Rajendiran on 03-03-2025 at 6:00 am

Substrate Vision Summit Engineered Substrate Panel Session

Engineered substrate technology is driving an evolution within the semiconductor industry. As Moore’s Law reaches its limits, the focus is shifting from traditional planar wafer scaling to innovative material engineering and 3D integration. Companies like Soitec, Intel and Samsung are pioneering this transition, unlocking… Read More