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MZ Technologies is Breaking Down 3D-IC Design Barriers with GENIO

MZ Technologies is Breaking Down 3D-IC Design Barriers with GENIO
by Mike Gianfagna on 11-27-2024 at 10:00 am

MZ Technologies is Breaking Down 3D IC Design Barriers with GENIO

3D-IC design can be both exciting and frustrating. It’s exciting because it opens a new world of innovation possibilities – opportunities that aren’t constrained by the rules of monolithic chip scaling. It can be frustrating because of the large array of complex technical challenges that must be overcome to make this new paradigm… Read More


Silicon Creations is Fueling Next Generation Chips

Silicon Creations is Fueling Next Generation Chips
by Mike Gianfagna on 11-21-2024 at 6:00 am

Silicon Creations is Fueling Next Generation Chips

Next generation semiconductor design puts new stress on traditionally low-key parts of the design process. One example is packaging, which used to be the clean-up spot at the end of the design. Thanks to chiplet-based design, package engineers are now rock stars. Analog design is another one of those disciplines.

Not long ago,… Read More


Alchip is Paving the Way to Future 3D Design Innovation

Alchip is Paving the Way to Future 3D Design Innovation
by Mike Gianfagna on 11-19-2024 at 6:00 am

Alchip is Paving the Way to Future 3D Design Innovation

At the recent TSMC OIP Ecosystem Forum in Santa Clara, there was an important presentation that laid the groundwork for a great deal of future innovation. Alchip and its IP and EDA partner Synopsys presented Efficient 3D Chiplet Stacking Using TSMC SoIC. The concept of 3D, chiplet-based design certainly isn’t new. SemiWiki maintains… Read More


The Chips R&D Program Seeks to Accelerate Innovation

The Chips R&D Program Seeks to Accelerate Innovation
by Joseph Byrne on 11-13-2024 at 10:00 am

chips timeline

The CHIPS and Science Act has allocated $11 billion for semiconductor R&D, including for advanced packaging and AI-driven design. Companies should apply now.

In 2022, the United States signed the $50 billion Chips and Science Act. Under the act, the National Institute of Standards and Technology (NIST), which is part of … Read More


Synopsys-Ansys 2.5D/3D Multi-Die Design Update: Learning from the Early Adopters

Synopsys-Ansys 2.5D/3D Multi-Die Design Update: Learning from the Early Adopters
by Daniel Nenni on 11-06-2024 at 10:00 am

banner for webinar

The demand for high-performance computing (HPC), data centers, and AI-driven applications has fueled the rise of 2.5D and 3D multi-die designs, offering superior performance, power efficiency, and packaging density. However, these benefits come with myriads of challenges, such as multi-physics, which need to be addressed.… Read More


Sarcina Democratizes 2.5D Package Design with Bump Pitch Transformers

Sarcina Democratizes 2.5D Package Design with Bump Pitch Transformers
by Mike Gianfagna on 10-24-2024 at 6:00 am

Sarcina Democratizes 2.5D Package Design with Bump Pitch Transformers

2.5D package design is rapidly finding its stride in a wide variety of applications, including AI. While there are still many challenges to its widespread adoption, the chiplet approach is becoming more popular compared to monolithic design. However, the required market to create a chiplet ecosystem is still under development.… Read More


Analog Bits Builds a Road to the Future at TSMC OIP

Analog Bits Builds a Road to the Future at TSMC OIP
by Mike Gianfagna on 10-21-2024 at 6:00 am

Analog Bits Builds a Road to the Future at TSMC OIP

The TSMC Open Innovation Platform (OIP) Ecosystem Forum has become the industry benchmark when it comes to showcasing industry-wide collaboration. The extreme design, integration and packaging demands presented by multi-die, chiplet-based design have raised the bar in terms of required collaboration across the entire … Read More


Navigating Resistance Extraction for the Unconventional Shapes of Modern IC Designs

Navigating Resistance Extraction for the Unconventional Shapes of Modern IC Designs
by Nada Tarek on 10-15-2024 at 6:00 am

Fig1 MEMS design

The semiconductor industry is experiencing rapid evolution, driven by the proliferation of IoT applications, image sensors, photonics, MEMS applications, 3DIC and other emerging technologies. This growth has dramatically increased the complexity of integrated circuit (IC) design. One aspect of this complexity is the … Read More


Maximizing 3DIC Design Productivity with 3DBlox: A Look at TSMC’s Progress and Innovations in 2024

Maximizing 3DIC Design Productivity with 3DBlox: A Look at TSMC’s Progress and Innovations in 2024
by Kalar Rajendiran on 10-08-2024 at 10:00 am

3DFabric Silicon Validated Thermal Analysis

At the 2024 TSMC OIP Ecosystem Forum, one of the technical talks by TSMC focused on maximizing 3DIC design productivity and rightfully so. With rapid advancements in semiconductor technology, 3DICs have become the next frontier in improving chip performance, energy efficiency, and density. TSMC’s focus on streamlining the… Read More


Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design

Synopsys and TSMC Pave the Path for Trillion-Transistor AI and Multi-Die Chip Design
by Kalar Rajendiran on 10-02-2024 at 10:00 am

OIP 2024 Synopsys TSMC

Synopsys made significant announcements during the recent TSMC OIP Ecosystem Forum, showcasing a range of cutting-edge solutions designed to address the growing complexities in semiconductor design. With a strong emphasis on enabling next-generation chip architectures, Synopsys introduced both new technologies and … Read More