A Memorable Samsung Event

A Memorable Samsung Event
by Daniel Nenni on 10-07-2022 at 6:00 am

Samsung DRAM Roadmap 2022

Samsung hosted its first-ever Samsung Tech Week Oct 3-5 with some insightful keynotes and great food. The week led off with Samsung Foundry Forum and a keynote from Foundry president, Si-Young Choi. Attendees at Samsung Foundry’s SAFE Forum were welcomed by Ryan Lee, head of the business’ Design Enablement team. John In-Young… Read More


WEBINAR: Taking eFPGA Security to the Next Level

WEBINAR: Taking eFPGA Security to the Next Level
by Daniel Nenni on 10-03-2022 at 6:00 am

SemiWiki Flex Logix Intrinsic-ID Webinar

We have written about eFPGA and for six years now and security even longer so it is natural to combine these two very important topics. Last month we covered the partnership between Flex Logix and Intrinsic ID, and the related white paper. Both companies are SemiWiki partners, so we were able to provide more depth and color:

In the … Read More


CEO Interview: Coby Hanoch of Weebit Nano

CEO Interview: Coby Hanoch of Weebit Nano
by Daniel Nenni on 09-30-2022 at 6:00 am

Weebit Nano Coby Hanoch Smaller2

Coby Hanoch comes to Weebit Nano with 15 years’ experience in engineering and engineering management and 26 years’ experience in sales management and executive roles. Coby was Vice President Worldwide Sales at Verisity where he was part of the founding team and grew the company to over $100M in annual sales which facilitated its… Read More


WEBINAR: How to Accelerate Ansys RedHawk-SC in the Cloud

WEBINAR: How to Accelerate Ansys RedHawk-SC in the Cloud
by Daniel Nenni on 09-28-2022 at 8:00 am

How to Accelerate Ansys RedHawk SC in the Cloud

 

As we all know, growing complexity of IC designs and the resulting numbers of EDA tools and design steps lead to very intricate workflows which require compute cycles that outstrip current compute capacity of most IC enterprises. The obvious question is how to efficiently leverage near infinite compute capacity in the … Read More


Ansys’ Emergence as a Tier 1 EDA Player— and What That Means for 3D-IC

Ansys’ Emergence as a Tier 1 EDA Player— and What That Means for 3D-IC
by Daniel Nenni on 09-20-2022 at 10:00 am

Ansys chip package board

Over its 40+ year history, electronic design automation (EDA) has seen many companies rise, fall, and merge. In the beginning, in the 1980s, the industry was dominated by what came to be known as the big three — Daisy Systems, Mentor Graphics, and Valid Logic (the infamous “DMV”). The Big 3 has morphed over the years, eventually settling… Read More


WEBINAR: O-RAN Fronthaul Transport Security using MACsec

WEBINAR: O-RAN Fronthaul Transport Security using MACsec
by Daniel Nenni on 09-19-2022 at 10:00 am

Commcore OMAC Webinar

5G provides a range of improvements compared to existing 4G LTE mobile networks in regards to capacity, speed, latency and security. One of the main improvements is in the 5G RAN; it is based on a virtualized architecture where functions can be centralized close to the 5G core for economy or distributed as close to the edge as possible… Read More


Samsung Foundry Forum & SAFE™ Forum 2022

Samsung Foundry Forum & SAFE™ Forum 2022
by Daniel Nenni on 09-16-2022 at 6:00 am

SFF SAFE GLOBAL Banner 400 400

It has been an exciting time in the semiconductor industry and the excitement is far from over. Years 2022 and 2023 will be more challenging in many different ways and live activities have just begun. The cornerstones to the semiconductor industry are the foundries so I look forward to the live foundry events coming up in October,… Read More


WEBINAR: Unlock your Chips’ Full Data Transfer Potential with Interlaken

WEBINAR: Unlock your Chips’ Full Data Transfer Potential with Interlaken
by Daniel Nenni on 09-12-2022 at 6:00 am

Interlaken Blog Post Graphic

Way back in the early 2000s when XAUI was falling short on link flexibility a search for an alternative chip-to-chip data transfer interface with SPI like features lead Cisco Systems and Cortina System to put forward the proposal for the Interlaken standard. The new standard married the best of XAUI’s serialized data and SPI’s … Read More


CEO Interview: Jan Peter Berns from Hyperstone

CEO Interview: Jan Peter Berns from Hyperstone
by Daniel Nenni on 09-09-2022 at 6:00 am

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Since 2012, Dr. Jan Peter Berns is the CEO of Hyperstone, a producer of Flash Memory Controllers for Industrially Embedded Storage Solutions. Before that, he held a Senior Manager Position at Toshiba Electronics for several years. Jan Peter brings more than 20 years of management and executive experience in the semiconductor… Read More


Today’s SoC Design Verification and Validation Require Three Types of Hardware-Assisted Engines

Today’s SoC Design Verification and Validation Require Three Types of Hardware-Assisted Engines
by Daniel Nenni on 09-06-2022 at 6:00 am

IC Chip Low angle light emitting 600x600

Lauro Rizzatti offers Semiwiki readers a two-part series on why three kinds of hardware-assisted verification engines are now a must have for semiconductor designs continues today. His interview below with Juergen Jaeger, Prototyping Product Strategy Director in the Scalable Verification Solution division at Siemens EDA,… Read More