A major challenge in the field of layout design lies in the post-layout parasitic extraction process, which often introduces delays and the potential for significant modifications in the layout. This paper introduces a novel approach to address this challenge, providing real-time parasitic estimations using Width Spacing… Read More
Author: Daniel Nenni
Unveiling the Future of Conversational AI: Why You Must Attend This LinkedIn Live Webinar
In the ever-evolving world of Conversational AI and Automatic Speech Recognition (ASR), an upcoming LinkedIn Live webinar is set to redefine the speech-to-text industry. Achronix Semiconductor Corporation is teaming up with Myrtle.ai to bring you a webinar on October 24, 2023, at 8:30am PST.
Moderated by EE Times’ Sr. Reporter,… Read More
CEO Interview: Islam Nashaat of Master Micro
Eng. Islam Nashaat received his B.Sc. and M.Sc. degrees from Ain Shams University, Cairo, Egypt, in 2010 and 2017, respectively. He joined Si-Vision as an Analog Physical Design Engineer in 2010, where he initiated the company’s CAD team in 2013, and became CAD and Physical Design Team Lead in 2016 after the company’s flagship … Read More
CEO Interview: Sanjeev Kumar – Co-Founder & Mentor of Logic Fruit Technologies
Sanjeev is a renowned technopreneur in the semiconductor industry. With more than 20+ years of experience, he is known for his enormous resilience and deep tech knowledge that sets him apart from others in the industry.
Sanjeev started his career as a hardware designer and then forayed into the FPGA domain due to his love for configurable… Read More
Lowering the DFT Cost for Large SoCs with a Novel Test Point Exploration & Implementation Methodology
With the increasing on-chip integration capabilities, large scale electronic systems can be integrated into a single System-on-Chip or SoC. New manufacturing test challenges are raised for more advanced technology nodes where both quality and cost during testing are affected. A typical parameter is test coverage which impacts… Read More
The True Power of the TSMC Ecosystem!
The 15th TSMC Open Innovation Platform® (OIP) was held last week. In preparation we did a podcast with one of the original members of the TSMC OIP team Dan Kochpatcharin. Dan and I talked about the early days before OIP when we did reference flows together. Around 20 years ago I did a career pivot and focused on Strategic Foundry Relationships.… Read More
CEO Interview: Stephen Rothrock of ATREG
Stephen Rothrock founded ATREG in 2000 to help global advanced technology companies divest and acquire infrastructure-rich manufacturing assets. Over the last 25 years, his firm has completed more than 100 transactions, representing over 40% of all global operational wafer fab sales in the semiconductor industry for operational,… Read More
WEBINAR: Emulation and Prototyping in the age of AI
Artificial Intelligence is now the primary driver of leading edge semiconductor technology and that means performance is at a premium and time to market will be measured in billions of dollars of revenue. Emulation and Prototyping have never been more important and we are seeing some amazing technology breakthroughs including… Read More
Power Supply Induced Jitter on Clocks: Risks, Mitigation, and the Importance of Accurate Verification
In the realm of digital systems, clocks play a crucial role in synchronizing various components and ensuring smooth flow of logic propagation. However, the accuracy of clocks can be significantly affected by power supply induced jitter. Jitter refers to the deviation in the timing of clock signals with PDN noise compared to ideal… Read More
WEBINAR: Why Rigorous Testing is So Important for PCI Express 6.0
In the age of rapid technological innovation, hyperscale datacenters are evolving at a breakneck pace. With the continued advancements in CPUs, GPUs, accelerators, and switches, faster data transfers are now paramount. At the forefront of this advancement is PCI Express (PCIe®), which has become the de-facto standard of interconnect… Read More
More Headwinds – CHIPS Act Chop? – Chip Equip Re-Shore? Orders Canceled & Fab Delay