Chip Agent: Revolutionizing Chip Design with Agentic AI

On July 18, 2025, ChipAgents AI, a Santa Barbara-based startup, showcased its innovative agentic AI platform for chip design and verification at a DACtv session. Led by CEO William Wong, a former CMU PhD and UC Santa Barbara professor, Chip Agent is redefining electronic design automation (EDA) by leveraging advanced AI agents to tackle the escalating complexity of modern chip design, from millions to trillions of gates. Wong, alongside head of research Koshin and head of engineering Meheer Aurora, presented how their technology addresses critical industry challenges, delivering significant productivity gains and accuracy improvements.

Wong began by highlighting the semiconductor industry’s struggles with soaring design complexity, project delays (up from 60% to 75% last year), and declining first-time silicon success rates (from 20% to 10%). Traditional EDA tools, designed decades ago, struggle to scale for today’s billion-gate designs, exacerbated by communication gaps between design and verification teams. Chip Agent’s solution is a suite of specialized AI agents that streamline the entire design-to-verification flow, from datasheet analysis to RTL code generation, testbench creation, and debugging. Deployed at top-10 semiconductor companies, their platform has already caught bugs in production chips, saving millions and demonstrating real-world impact.

Chip Agent’s AI agents, built on state-of-the-art large language models (LLMs), excel in domain-specific tasks. Unlike general-purpose AI, which may hallucinate on technical queries, their agents are fine-tuned for EDA, achieving 97-99% accuracy on Nvidia’s Verilog Evo benchmark for specification-to-RTL tasks and leading results on OpenAI’s SWE-bench for Python-based high-level synthesis. Their proprietary “sweet search” algorithm, combining Monte Carlo tree search with iterative refinement, was presented at the International Conference on Learning Representations in 2025, showcasing their research prowess. These agents support tasks like generating SystemVerilog assertions, UVM testbenches, and readable finite state machine documentation, reducing development time by up to 80%.

Koshin explained the technical foundation, noting that LLMs are next-word predictors trained on vast datasets, including Verilog code, enabling them to handle EDA-specific tasks like predicting correct code syntax or answering domain-specific queries. Agentic AI enhances this by incorporating feedback loops, allowing agents to learn from user inputs and past results, unlike static traditional tools. This adaptability ensures continuous improvement, critical for handling dynamic design changes. For instance, Chip Agent can analyze updated design specs, identify necessary codebase modifications, and implement them rapidly, often completing the process end-to-end for smaller changes.

The live demo by Aurora showcased Chip Agent’s ability to generate thousands of lines of high-quality, compilable SystemVerilog code in minutes, a feat enabled by their “self-stabilization” process within the agentic loop. This ensures robustness against design changes, a key advantage for complex system-on-chip (SoC) integration. The platform supports multimodal inputs, including block diagrams in formats like MermaidJS, facilitating hierarchical design tasks. While currently focused on front-end design up to synthesis, Wong noted interest in back-end tasks like placement and routing, drawing parallels to their success in generating CUDA kernels competitive with human experts.

Addressing audience questions, Wong detailed their infrastructure, running on elastic clusters of Nvidia H200 GPUs via AWS, offering flexibility through software-as-a-service, single-tenant, or bespoke deployments. This cloud-centric approach keeps pace with rapid hardware advancements, avoiding obsolescence. On future directions, Wong emphasized improving agentic workflows with “light informal proofs” to simplify code review, a novel research area to enhance trust in AI-generated outputs. Chip Agent’s open-source compatibility and focus on correctness ensure broad applicability, positioning them to scale toward subsystem-level designs with complex protocols like CMN. With a Series A-funded team of 10-15, Chip Agent invites collaboration at their DAC booth, signaling a bold vision for fully agentic tape-out processes in the coming years.

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