Frontier models (Claude, etc.) are very powerful but becoming expensive for high token counts. Methods to exploit a mix of models, including local open-weight models, are attracting attention. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer… Read More
Intel Wildcat Lake: Right-Sizing Silicon Without Sinking PerformanceLance Hacking, Intel Intel Core Series 3, code-named…Read More
Optimizing for Thermoelastic in Package and PCB Design from the OutsetSignoff-quality design tools are mandatory for signoff, though…Read MoreCEO Interview with Phillip Stanley-Marbell of Signaloid
Phillip Stanley-Marbell is the founder and CEO of Signaloid. Up until September 2025, he was a full Professor (Chair of Physical Computation) in the Electrical Engineering Division of the Department of Engineering at the University of Cambridge, where he led the Physical Computation Laboratory. He completed his PhD at Carnegie… Read More
Five Billion Pulses Later: What DUV Optics Testing Reveals About Semiconductor Tool Uptime
By Dr. Sabina Kuprėnaitė
Deep-ultraviolet optics used in semiconductor lithography may be exposed to billions of pulses over their service life. That creates a qualification challenge that initial reflectance specifications or laser-induced damage thresholds alone cannot answer.
A mirror may meet its optical specification… Read More
CEO Interview with Stephen Strausser of VON ARDENNE North America, Inc.
Stephen Strausser was recently appointed CEO of VON ARDENNE North America, Inc. where he will lead the company’s regional strategy, operations, customer engagement and growth initiatives across the US, Canada, Mexico and South America.
Stephen has a powerful blend of business acumen, operations, service/support and engineering… Read More
Podcast EP363: The Impact of an AI Factory on Production Deployment with NeuReality’s Moshe Tanach
Daniel is joined by Moshe Tanach, co-founder and CEO of NeuReality. Prior to founding the company, he held senior engineering leadership roles at Marvell and Intel, where he led complex wireless and networking products from architecture through mass production. He also served as AVP of R&D at DesignArt Networks (later acquired… Read More
Will Agentic AI Help the Open-Source EDA Market?
Agentic artificial intelligence is likely to give the open-source electronic design automation market a meaningful boost. Its biggest contribution will not be the immediate replacement of established commercial platforms from Cadence, Synopsys, or Siemens. Instead, agentic AI can make open-source tools easier to use, … Read More
TSMC’s Overseas Fabs Are Paying Off
TSMC’s overseas fabrication strategy is beginning to deliver its intended return: not immediate cost parity with Taiwan, but manufacturable geographic redundancy, closer integration with major customers and access to subsidized capacity in strategically important markets. Arizona and Kumamoto are already producing … Read More
Crescent Island: Turning Memory Capacity into Agentic AI Throughput
Intel’s Crescent Island is a discrete data-center GPU designed for agentic AI inference, where performance is constrained by more than matrix arithmetic. Multi-step agents impose latency through repeated model calls and tool interactions, consume large memory capacity for weights and long-context key-value caches, and… Read More
AI-designed Chip Points Toward a Faster Future for Custom Silicon
Architect Labs says it has created Redwood, an AI accelerator designed and verified almost entirely by artificial intelligence in less than two weeks. If independently validated and successfully translated from a programmable prototype into manufactured silicon, the project could represent a major change in how computer… Read More
Huawei Can’t Shrink Its Chips, So It’s Folding Them
On May 25, Huawei semiconductor chief He Tingbo unveiled LogicFolding, an architecture intended to advance chip performance without relying on ever-smaller transistors. Presented alongside Huawei’s “Tau Scaling Law,” the approach prioritizes signal speed over transistor dimensions. It is a genuine engineering response… Read More




Huawei Can’t Shrink Its Chips, So It’s Folding Them