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When Design Gets Faster, the Bottleneck Moves Through the Physical Stack

When Design Gets Faster, the Bottleneck Moves Through the Physical Stack
by Moh Kolb on 09-07-2026 at 6:00 am

Desing fast Bott through physicalstack

AI can compress the path to tape-out. The next challenge is compressing physical realization.

Something important is beginning to happen in semiconductor development: the design cycle itself is becoming compressible.

AI-assisted engineering can accelerate architecture exploration, RTL development, verification, physical… Read More


Comparing Advanced Packaging from TSMC, Intel Foundry, and Samsung Foundry

Comparing Advanced Packaging from TSMC, Intel Foundry, and Samsung Foundry
by Daniel Nenni on 09-06-2026 at 10:00 am

Advanced Chip Packaging Comparison INtel TSMC Samsung

Advanced semiconductor packaging has become essential to improving computing performance as conventional transistor scaling grows more difficult and expensive. Instead of manufacturing an entire processor as one large monolithic die, chipmakers can divide it into smaller chiplets and combine logic, memory, input/output… Read More


CEO Interview with Sander den Hoedt of Delmic

CEO Interview with Sander den Hoedt of Delmic
by Daniel Nenni on 09-06-2026 at 8:00 am

Sander headshot

Sander is an Applied-physics graduate from TU Delft. Worked at a semiconductor start-up during his studies, decided building a company would be the most interesting way to shape his career. In 2010, a TU Delft professor suggested combining light and electron microscopy. Sander and co-founder Andries Effting took the patent … Read More


Semicon West: Transforming Tomorrow One Chip at a Time

Semicon West: Transforming Tomorrow One Chip at a Time
by Daniel Nenni on 09-06-2026 at 6:00 am

Semicon West 2026 Transforming Tomorrow One Chip at a Time

SEMICON West 2026 arrives at a pivotal moment for the global chip industry. Scheduled for October 13–15 at San Francisco’s Moscone Center, the event returns to the Bay Area after its 2025 edition in Phoenix. Organized by SEMI under the theme “Transform Tomorrow,” it will bring together semiconductor manufacturers, equipment… Read More


Podcast EP364: The Broad Impact of Advanced Mask Solutions, Today and Tomorrow with Dr. Germain Fenger

Podcast EP364: The Broad Impact of Advanced Mask Solutions, Today and Tomorrow with Dr. Germain Fenger
by Daniel Nenni on 09-04-2026 at 10:00 am

Daniel is joined by Dr. Germain Fenger, Senior Director of Product Management at Synopsys where he leads advanced mask solutions and computational lithography technologies. With a background spanning semiconductor manufacturing, lithography research, engineering, and product leadership, Germain has held roles at imec,… Read More


CEO Interview with Timothy Regan of IN2FAB

CEO Interview with Timothy Regan of IN2FAB
by Daniel Nenni on 09-04-2026 at 8:00 am

Timothy Regan

Timothy Regan has substantial experience in analog/ mixed signal design and its supporting EDA technologies. His career began in linear engineering at Texas Instruments.

He then worked as an applications specialist for both GE-Calma and Valid Logic Systems. After that, he spent 10 years as managing director at Design Resources… Read More


The $9.5 Billion Design IP Market: Shifting Boundaries, Arm’s Monopoly, and the RISC-V Response

The $9.5 Billion Design IP Market: Shifting Boundaries, Arm’s Monopoly, and the RISC-V Response
by Kalar Rajendiran on 09-04-2026 at 6:00 am

2025 Design IP Sub Categories Market Share Pie Chart

While semiconductor design intellectual property (IP) is a $9.45 billion market, it acts as the absolute architectural bottleneck for the entire global semiconductor value chain. The choices made at the IP layer today dictate the cost, power, and security of a downstream technology economy rapidly marching toward a trillion… Read More


Technical Case Study: MicroLED Yield Management with Plessey and yieldWerx

Technical Case Study: MicroLED Yield Management with Plessey and yieldWerx
by Daniel Nenni on 09-03-2026 at 2:00 pm

Technical Case Study MicroLED Yield Management at Plessey

Plessey Semiconductors manufactures monolithic MicroLED displays for near-eye augmented-reality systems, where pixel pitch, brightness, uniformity, and defect density directly determine usable yield. Its process integrates device design, epitaxy, wafer fabrication, bonding, and production in one facility. The displays… Read More


Unified Emulation and Prototyping: Pipedream or Reality?

Unified Emulation and Prototyping: Pipedream or Reality?
by Lauro Rizzatti on 09-03-2026 at 10:00 am

Unified Emulation and Prototyping Pipedream or Reality Figure 1

Preamble
Hardware-assisted verification (HAV) platforms, including hardware emulators and FPGA-based prototyping systems, are the two dominant methodologies for validating long workloads on complex System-on-Chip (SoC) designs before tape-out. HAV sits within a broader continuum of verification engines: simulationRead More


HBM’s Vertical Ascent: Why Packaging Is Becoming the Heart of AI Memory

HBM’s Vertical Ascent: Why Packaging Is Becoming the Heart of AI Memory
by Admin on 09-03-2026 at 6:00 am

HBM’s Vertical Ascent

SK hynix’s Hot Chips 2026 presentation explains how High Bandwidth Memory (HBM) is evolving to meet the extraordinary memory requirements of artificial intelligence. Its central message is that future progress will depend not only on better DRAM circuits but also on advanced packaging, denser vertical integration, improved… Read More