Silicon Catalyst has emerged as a distinctive force in the global start-up ecosystem, positioning itself not merely as an accelerator, but as a launchpad for deep-technology innovation. Focused primarily on semiconductor and hardware-based start-ups, Silicon Catalyst addresses a long-standing gap in the venture landscape:… Read More
Simulating Quantum Computers. Innovation in VerificationQuantum algorithms must be simulated on classical computers…Read More
Kirin 9030 Hints at SMIC's Possible Paths Toward >300 MTr/mm2 Without EUVEarlier this month, TechInsights did a teardown of…Read More
Why TSMC is Known as the Trusted FoundryTaiwan Semiconductor Manufacturing Company (TSMC) is widely regarded…Read More
Journey Back to 1981: David Patterson Recounts the Birth of RISC and Its Legacy in RISC-VIn a warmly received keynote at the RISC-V…Read More
Assertion-First Hardware Design and Formal Verification ServicesGenerative AI has transformed software development, enabling entire…Read MoreCEO Interview with Artem Golubev of testRigor
Artem Golubev is the founder and CEO of testRigor, a company revolutionizing software test automation through AI-powered plain English testing. With a mission to eliminate the massive maintenance overhead that plagues traditional testing tools while simultaneously improving test coverage, testRigor has enabled hundreds… Read More
Podcast EP325: How KIOXIA is Revolutionizing NAND FLASH Memory
Daniel is joined by Doug Wong, senior member of the technical staff at KIOXIA America, where he has contributed to the advancement of memory technologies since 1993. He began his career with KIOXIA in the company’s Memory Division (then part of Toshiba America) and has since focused on a broad range of memory solutions, including… Read More
Revolutionizing Hardware Design Debugging with Time Travel Technology
In the semiconductor industry High-Level Synthesis (HLS) and SystemC have become essential tools, allowing engineers to model complex hardware designs using familiar C/C++ constructs. Yet, despite the widespread adoption of these languages, the debugging workflows in hardware development lag far behind those in software… Read More
Addressing Silent Data Corruption (SDC) with In-System Embedded Deterministic Testing
Silent Data Corruption (SDC) represents a critical challenge in modern semiconductor design, particularly in high-performance computing environments like AI data centers. As highlighted in a collaborative presentation by Broadcom Inc. and Siemens EDA at the 2025 TSMC OIP event, SDC occurs when hardware defects cause erroneous… Read More
TSMC’s 6th ESG AWARD Receives over 5,800 Proposals, Igniting Sustainability Passion
Taiwan Semiconductor Manufacturing Company has once again demonstrated its leadership in corporate sustainability with the successful conclusion of its 6th ESG AWARD, which attracted more than 5,800 proposals from employees across the organization. The overwhelming response reflects not only TSMC’s strong internal engagement… Read More
Tiling Support in SiFive’s AI/ML Software Stack for RISC-V Vector-Matrix Extension
At the 2025 RISC-V Summit North America, Min Hsu, Staff Compiler Engineer at SiFive, presented on enhancing tiling support within SiFive’s AI/ML software stack for the RISC-V Vector-Matrix Extension (VME). This extension aims to boost matrix multiplication efficiency, a cornerstone of AI workloads. SiFive’s… Read More
TSMC based 3D Chips: Socionext Achieves Two Successful Tape-Outs in Just Seven Months!
Socionext’s recent run of rapid 3D-IC tape-outs is a noteworthy milestone for the industry with two successful tape-outs in just seven months for complex, multi-die designs aimed at AI and HPC workloads. That pace of iteration highlights how advanced packaging, richer EDA toolchains, and closer foundry-ecosystem collaboration… Read More
RISC-V Extensions for AI: Enhancing Performance in Machine Learning
In a presentation at the RISC-V Summit North America 2025, John Simpson, Senior Principal Architect at SiFive, delved into the evolving landscape of RISC-V extensions tailored for artificial intelligence and machine learning. RISC-V’s open architecture has fueled its adoption in AI/ML markets by allowing customization… Read More
Runtime Elaboration of UVM Verification Code
Recently, I reported on my conversation with Cristian Amitroaie, CEO of AMIQ EDA, about automated generation of documentation from design and verification code. Before we chose that topic for a post, Cristian described several capabilities of the AMIQ EDA product family that might be of interest to design and verification engineers.… Read More


Quantum Computing Technologies and Challenges