Enabling AI to Understand Complex Runtime Behavior for Accurate, Automated Root Cause Analysis — DAC 2026

Undo gives AI coding agents the runtime context they need to solve hard problems in complex software and system verification workflows Undo’s technology records complete program execution, allowing engineers and AI coding agents to understand exactly what happened during execution rather than inferring behavior from source code, logs, or waveforms alone.

Leading semiconductor companies use Undo to accelerate debug across C/C++, SystemC models, and software components used throughout modern silicon development.

Target applications

• System-level verification (C++/SystemC)
• Virtual platforms and fast functional models
• High-Level Synthesis (HLS)
• Complex EDA applications

Challenges being addressed

Semiconductors

System verification

• Long regression debug cycles. Failing regressions often require engineers to spend hours or days reproducing failures and tracing through complex software and hardware interactions before they can identify the root cause.
• Root cause analysis across complex verification environments. As designs grow in complexity, failures can originate anywhere in the verification stack, including the testbench, SystemC models, virtual platforms, firmware, RTL, or the interaction between them – making diagnosis increasingly difficult.

System design architects

• Limited confidence in architectural exploration. System architects depend on simulation models to evaluate architectural trade-offs before silicon. Functional issues in those models often limit workload coverage, reducing confidence that enough meaningful use cases have been exercised before key design decisions are locked in.

AI-assisted workflows

• Scaling engineering expertise with AI. Generic LLMs (and even models fine-tuned on proprietary engineering data) cannot capture the deep, experience-based knowledge verification engineers apply when diagnosing failures on real silicon. Runtime context from the live design is far more valuable than only static training data or generic LLM intelligence. Undo provides that runtime context – and you can’t get that data any other way.
• AI lacks visibility into C/C++ execution. RTL verification benefits from waveforms that capture signal activity over time, providing both engineers and AI with a complete picture of execution. In C/C++ and SystemC, there is no equivalent representation of runtime behavior. Without that runtime evidence, AI agents are forced to infer what happened from source code and logs alone, reducing the accuracy of root cause analysis.

EDA / Computational Software

EDA R&D teams

• Debugging extremely complex C++ codebases. EDA tools tend to be large and complex codebases that have evolved over decades and therefore are especially difficult to understand.
• Debugging non-deterministic and hard-to-reproduce failures. Many EDA tools are multi-threaded and process huge customer designers. Incorrect results are incredibly difficult to reproduce and R&D engineers can spend significant time trying to recreate the customer’s environment.
• Resolving customer escalations. With critical customer designs being blocked, R&D teams often need to rapidly determine whether the issue is a tool defect, a model issue, or customer input. But rigorous IP protection protocols and constrained access to the failing environment make diagnosing issues extremely difficult and time-consuming.

EDA AE teams

• Reproducing and investigating complex customer issues. When customers encounter crashes, incorrect simulation results, or unexpected behavior on large proprietary designs, the race is on to try to investigate and reduce escalations to R&D.
• Limited visibility into customer environments. Customers often cannot share their entire design due to IP restrictions. So AEs often have to diagnose problems from incomplete logs, waveforms, stack traces and screenshots.

Target audience

• System verification teams who need to reduce debug time across their silicon verification workflows.
• System design architects who need to increase use case coverage and ensure a higher quality design.
• Engineering leaders driving AI adoption across semiconductor engineering teams and/or responsible for system verification productivity
• EDA R&D teams working complex EDA applications
• EDA application engineers responsible for debugging complex EDA software on-site at customers

Booth information

Come meet us on booth # 858 at DAC! Our Solution Architects will be there to demo the tech live, so you can see how it works.

Schedule a DAC Demo

Other DAC engagements:

• Attend our poster session on “Agentic Time-Travel Debugging for HLS Code”
• Participate in our raffle to win a free Undo license and a coveted Lego set

Curious about how verification teams at AMD and system design architects at NVIDIA are using Undo’s technology? Get in touch directly with Chirag Goyal (Chair of the System & Software Deployment track at DAC) for an on-site meeting.

Also Read:

Revolutionizing Hardware Design Debugging with Time Travel Technology

Taming Concurrency: A New Era of Debugging Multithreaded Code

Video EP7: The impact of Undo’s Time Travel Debugging with Greg Law