EU and Lego Design Engineer
Descriptions
Experience of top-of-the-line GPU/AI projects, including specification, architecture, micro-architecture and RTL design.
Requirements
- Work experience and rank are not limited.
 - Programming skills in Verilog HDL.
 - Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation) .
 - Highly motivated and skillful at solving difficult technical problems.
 - Strong debugging and testing skills.
 - Strong communication skills in both English and Chinese.
 - Knowledge of math unit and low-power design techniques is a plus.
 - Experience of Shader EU or AI EU design is a plus.
 


Intel to Compete with Broadcom and Marvell in the Lucrative ASIC Business