Methodics solutions enable high-performance hierarchical analog/mixed signal, digital, software, embedded software, and SOC design collaboration across multi-site and multi-geographic design teams, assuring full traceability of the use and reuse of important design assets for Functional Safety compliance with such standards as ISO26262 and DO-254. With Methodics, traceability is built into the design process – it’s not added on as an after thought.
Advanced IP distribution, cataloging, and workspace management ensure that no matter where designers are located they have full visibility into the IP available to them and can easily access the corresponding data.
And integration of IP Lifecycle Management with industry-standard data management solutions, such as Perforce, Subversion, Git and others makes designs more efficient and predictable, and with higher quality. This approach ensures data is safe, always available, and that the tools can take advantage of the latest advancements from the software configuration management community.
Our highly scalable and industry proven solutions are ideal for large multinational, multisite SoC design teams as well as for small, specialized design teams.
Percipient is Methodic’s comprehensive IP Lifecycle Management platform, enabling companies of all sizes to have complete control over the design and integration of both internal and external design elements including libraries, new analog and digital design and standalone IP. [MORE…]
The VersIC 2.0 Platform is a new approach to the management of IC design data. It provides a comprehensive, unified and reliable design data management (DM) experience in the Cadence design environment. With VersIC a truly collaborative design environment across multiple design locations is possible. Cadence libraries, Verilog, Ocean scripts, software, docs and other design assets can be versioned, configured and released on one platform with a single point of release. [MORE…]
Warpstor. With every process node and every SOC design, IT teams are experiencing an unprecedented data explosion. User workspaces routinely exceed 10’s of GB, sometimes 100’s of GB. Regression runs, characterization runs, design and debug workspaces – all of these put a great stress on Network Attached Storage (NAS), create NFS bottlenecks and cause significant project delays. And things are only going to get worse. [MORE…]
More Headwinds – CHIPS Act Chop? – Chip Equip Re-Shore? Orders Canceled & Fab Delay