Tag: webinar

Webinar: Turning Compliance Into Competitive Credibility: Exclusive Launch of New CMMC Readiness Research

Webinar: Turning Compliance Into Competitive Credibility: Exclusive Launch of New CMMC Readiness Research
by Admin on 01-07-2026 at 3:12 am

About this event

Be the first to see brand new, Keysight-commissioned research on Cybersecurity Maturity Model Certification (CMMC) readiness across the U.S. Defense Industrial Base. In this live webinar, we’ll unveil findings from hundreds of security, IT, and compliance leaders and show where organizations really

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Webinar: Physics-Based Foundations for Power Supply Design

Webinar: Physics-Based Foundations for Power Supply Design
by Admin on 01-07-2026 at 3:10 am

Overview:

This webinar provides engineers with a science-driven framework for power supply design, rooted in the physics of electromagnetic energy flow. Inspired by Ralph Morrison’s pioneering approach, the session begins with core principles of energy behavior, then explores how current, fields, and waves interact inside

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Webinar: Accelerate IC Layout Parasitic Analysis with ParagonX

Webinar: Accelerate IC Layout Parasitic Analysis with ParagonX
by Admin on 12-19-2025 at 12:45 pm

We are pleased to offer two webinar sessions for your convenience. Please choose the time that best fits your schedule:

10:00AM – 12:00PM CET (session #1 for EMEA/APAC)
10:00AM – 12:00PM PST (session #2 for NA)

Featured Speakers:

  • Kopal Kulshreshtha, Principal Product Specialist, Synopsys
  • Rob Dohanyos, Principal Product
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Webinar: Advances in ATPG: From Power and Timing Awareness to Intelligent Pattern Search with AI

Webinar: Advances in ATPG: From Power and Timing Awareness to Intelligent Pattern Search with AI
by Admin on 12-19-2025 at 12:41 pm

Date: Jan 14, 2026 | 10:00 AM PST

Featured Speakers:

  • Srikanth Venkat Raman, Product Management Director, Synopsys
  • Khader Abdel-Hafez, Scientist, Synopsys
  • Theo Toulas, R&D Principal Engineer, Synopsys
  • Bruce Xue, Staff Engineer, Synopsys

As System-on-Chip (SoC) designs become increasingly complex, meeting test quality

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Webinar: Solving Timing closure challenges using Gencellicon (previously Excellicon)

Webinar: Solving Timing closure challenges using Gencellicon (previously Excellicon)
by Admin on 12-16-2025 at 6:16 pm

Timing closure is one of the most challenging aspects of ASIC design. While traditionally seen as a backend process, its resolution begins at the architectural level and extends through the implementation stages. This webinar examines the key obstacles designers encounter and demonstrates how our timing closure solutions

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Terascale AI, 1.6T and Beyond Seminar: Santa Clara

Terascale AI, 1.6T and Beyond Seminar: Santa Clara
by Admin on 12-11-2025 at 1:17 pm

About this event

Next-generation AI systems are pushing electrical, optical, and packaging technologies to their limits. Join Keysight experts as they share insights on validating 224G / 448G SerDes, preparing for emerging IEEE 1.6T optical standards, advancing silicon photonics, and strengthening die-to-die interconnects

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Webinar: PQShield with Microchip’s PolarFire® SoC FPGAs: Securing the Future of Embedded Systems in the Post-Quantum Era

Webinar: PQShield with Microchip’s PolarFire® SoC FPGAs: Securing the Future of Embedded Systems in the Post-Quantum Era
by Admin on 12-11-2025 at 12:56 pm

As the quantum threat moves from theory to reality, attacks put all long-lifecycle designs at risk. In this early PQC era, simply implementing the new NIST algorithms isn’t enough. Implementations will evolve, and new physical attacks like side-channel analysis present a major threat to the security of these complex

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Webinar: Why AI-Assisted Security Verification For Chip Design is So Important

Webinar: Why AI-Assisted Security Verification For Chip Design is So Important
by Admin on 12-11-2025 at 12:54 pm

In this webinar, we will explore the growing threat that AI-fueled cyberattacks pose to chip designs and how to add expert-level security verification to your design flow to minimize those risks.

We will expose some of the details of the existential risk for electronic systems with real examples. We will then describe technology… Read More

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Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion Silicon

Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion Silicon
by Daniel Nenni on 11-27-2025 at 8:00 am
Categories: Aion Silicon, Arteris, Events, Semiconductor Services
1 Comment

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The explosive growth of AI and accelerated computing is placing unprecedented demands on system-on-chip (SoC) design. Modern AI workloads require extremely high bandwidth, ultra-low latency, and energy-efficient data movement across increasingly heterogeneous architectures. As SoCs scale to incorporate clusters of… Read More

Webinar: 5 Expectations for the Manufacturing Market in 2026

Webinar: 5 Expectations for the Manufacturing Market in 2026
by Admin on 09-30-2025 at 12:02 am

Discover the 5 Critical Manufacturing Market Trends Reshaping Semiconductors in 2026

AI-driven investments, sustainability, and advanced materials—what’s next for semiconductor manufacturing.

The semiconductor manufacturing industry is undergoing a transformative period as AI-driven investments accelerate, sustainability… Read More