Webinar: Post-layout Circuit Sizing Optimization

Webinar: Post-layout Circuit Sizing Optimization
by Daniel Payne on 09-29-2022 at 4:00 pm

IC design workflow min

My IC design career started out with manually sizing transistors to improve performance, while minimizing layout area and power consumption. Fortunately we don’t have to do manual transistor sizing anymore, thanks to EDA tools that are quicker and more accurate than manual methods. MunEDA is an EDA vendor that has developed… Read More