Smart Verification for Complex UCIe Multi-Die Architectures

Smart Verification for Complex UCIe Multi-Die Architectures
by Admin on 09-08-2025 at 10:00 am

Figure 1

By Ujjwal Negi – Siemens EDA

Multi-die architectures are redefining the limits of chip performance and scalability through the integration of multiple dies into a single package to deliver unprecedented computing power, flexibility, and efficiency. At the heart of this transformation is the Universal Chiplet Interconnect… Read More


Alchip’s 3DIC Test Chip: A Leap Forward for AI and HPC Innovation

Alchip’s 3DIC Test Chip: A Leap Forward for AI and HPC Innovation
by Daniel Nenni on 09-04-2025 at 10:00 am

Alchip 3D IC Test Chip TSMC N2

Today Alchip Technologies, a Taipei-based leader in high-performance and AI computing ASICs, announced a significant milestone with the successful tape-out of its 3D IC test chip. This achievement not only validates Alchip’s advanced 3D IC ecosystem but also positions the company as a frontrunner in the rapidly evolving field… Read More


eBook on Mastering AI Chip Complexity: Pathways to First-Pass Silicon Success

eBook on Mastering AI Chip Complexity: Pathways to First-Pass Silicon Success
by Admin on 09-01-2025 at 8:00 am

MArtering AI Chip Complexity Synopsys

The rapid evolution of artificial intelligence (AI) is transforming industries, from autonomous vehicles to data centers, demanding unprecedented computational power and efficiency. As highlighted in Synopsys’ guide, the global AI chip market is projected to reach $383 billion by 2032, growing at a 38% CAGR. This … Read More


Revolutionizing Chip Packaging: The Impact of Intel’s Embedded Multi-Die Interconnect Bridge (EMIB)

Revolutionizing Chip Packaging: The Impact of Intel’s Embedded Multi-Die Interconnect Bridge (EMIB)
by Admin on 08-27-2025 at 10:00 am

Intel Foundry Packaging Evolution 2025

In an era dominated by artificial intelligence (AI), machine learning (ML), and high-performance computing (HPC), the demand for semiconductors that deliver high data throughput, low latency, and energy efficiency has never been greater. Traditional chip designs often struggle to keep pace with these requirements, leading… Read More


Streamlining Functional Verification for Multi-Die and Chiplet Designs

Streamlining Functional Verification for Multi-Die and Chiplet Designs
by Daniel Nenni on 08-14-2025 at 6:00 am

Streamlining Functional Verification for Multi Die and Chiplet Designs

As multi-die and chiplet-based system designs become more prevalent in advanced electronics, much of the focus has been on physical design challenges. However, verification—particularly functional correctness and interoperability of inter-die connections—is just as critical. Interfaces such as UCIe or custom interconnects… Read More


UCIe 3.0: Doubling Bandwidth and Deepening Manageability for the Chiplet Era

UCIe 3.0: Doubling Bandwidth and Deepening Manageability for the Chiplet Era
by Daniel Nenni on 08-05-2025 at 10:00 am

Chiplet SemiWiki UCIe

The Universal Chiplet Interconnect Express (UCIe) 3.0 specification marks a decisive step in the industry’s shift from monolithic SoCs to modular, multi-die systems. Released on August 5, 2025, the new standard doubles peak link speed from 32 GT/s in UCIe 2.0 to 48 and 64 GT/s while adding a suite of manageability and efficiency

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cHBM for AI: Capabilities, Challenges, and Opportunities

cHBM for AI: Capabilities, Challenges, and Opportunities
by Kalar Rajendiran on 07-31-2025 at 6:00 am

cHBM Panelists at Synopsys Executive Forum

AI’s exponential growth is transforming semiconductor design—and memory is now as critical as compute. Multi-die architecture has emerged as the new frontier, and custom High Bandwidth Memory (cHBM) is fast becoming a cornerstone in this evolution. In a panel session at the Synopsys Executive Forum, leaders from AWS, Marvell,… Read More


Alphawave Semi and the AI Era: A Technology Leadership Overview

Alphawave Semi and the AI Era: A Technology Leadership Overview
by Daniel Nenni on 07-14-2025 at 8:00 am

AI Market Silicon Forecast 2025

The explosion of artificial intelligence (AI) is transforming the data center landscape, pushing the boundaries of compute, connectivity, and memory technologies. The exponential growth in AI workloads—training large language models (LLMs), deploying real-time inference, and scaling distributed applications—has … Read More


Intel’s Path to Technological Leadership: Transforming Foundry Services and Embracing AI

Intel’s Path to Technological Leadership: Transforming Foundry Services and Embracing AI
by Kalar Rajendiran on 05-06-2025 at 10:00 am

Compressed Dont be encumbered by history

Intel, long a leader in semiconductor manufacturing, is on a determined journey to reclaim its technological leadership in the industry. After facing significant challenges in recent years, the company is making a concerted effort to adapt and innovate, with a clear focus on AI-driven technologies, advanced packaging solutions,… Read More


Design IP Market Increased by All-time-high: 20% in 2024!

Design IP Market Increased by All-time-high: 20% in 2024!
by Eric Esteve on 04-14-2025 at 10:00 am

Top5 License

Design IP revenues achieved $8.5B in 2024 and this is an all-time-high growth of 20%. Wired Interface is still driving Design IP growth with 23.5% but we see the Processor category also growing by 22.4% in 2024. This is consistent with the Top 4 IP companies made of ARM (mostly focused on processor) and a team leading wired interface… Read More