Machine Learning Meets Scan Diagnosis for Improved Yield Analysis

Machine Learning Meets Scan Diagnosis for Improved Yield Analysis
by Tom Simon on 07-30-2018 at 12:00 pm

Naturally, chips that fail test are a curse, however with the advent of Scan Logic Diagnosis these failures can become a blessing in disguise. Through this technique information gleaned from multiple tester runs can help pin down the locations of defects. Initially tools that did Scan Logic Diagnosis relied on the netlist to filter… Read More