Earlier this week I went to the Synopsys Interoperability Forum. The big news of the day turned out to be Synopsys wanting to be more than interoperable with Magma, but that only got announced after we’d all gone away.
Philippe Margashack of ST opened, reviewing his slides from a presentation at the same forum from 10 years … Read More
Did we (the analyst) completely underestimate SuperSpeed USB take-off, or is the company tweaking the meaning of “USB 3.0 IP Design-In”? This PRfrom PLDA could be understood as a claiming from the IP vendor that they have achieved the 100[SUP]th[/SUP] design win for their USB 3.0 IP… Let’s try to understand how PLDA can make more… Read More
Denali acquisition by Cadence in May 2010, ChipIdea, Virage Logic, and nSys acquisitions by Synopsys in 2009, 2010 and 2011 (resp.) shows that IP market is consolidating… but new IP vendors are still emerging! So we need to know on which product the Interface IP market leader will tend to a dominant position, which new products… Read More
I just put up a blog about the EDA interoperability forum, much of which is focused on standards. Which reminded me just how long-lived some standards turn out to be.
Back in the late 1970s Calma shipped workstations (actually re-badged Data General minicomputers) with a graphic display. That was how layout was done. It’s… Read More
The 24th Interoperability Forum is coming up at the end of the month on November 30th to be held at the Synopsys compus in Mountain View. It lasts from 9am until lunch (and yes, Virginia, there is such a thing as a free lunch). I think it looks like a very interesting way to spend a morning.
Here are the speakers and what they are speaking… Read More
Is it surprising to see that Synopsys has been selected Interface IP partner of the year by TSMC? Not really, as the company is the clear leader on this IP market segment (which includes USB, PCI Express, SATA, DDRn, HDMI, MIPI and others protocols like Ethernet, DisplayPort, Hyper Transport, Infiniband, Serial RapidIO…). But,… Read More
Verilog History
Prabhu Goel founded Gateway Design Automation and Phil Moorby wrote the Verilog language back in 1984. In 1989 Cadence acquired Gateway and Verilog grew into a de-facto HDL standard. I first met Prabu at Wang Labs in 1982 where I designed a rather untestable custom chip named the WL-2001 (yes, it was named to honor… Read More
Introduction from Hezi Saar: Eric’s latest viewpoints and reports are host onIPnestas well as on Semiwikiand you can find information related to various Interface IP: USB 3.0, PCIe, SATA, DDRn, MIPI, HDMI and more.
Q: Eric, give us a quick introduction about your background as it relates to interface IP
A: I have spent 20 years working… Read More
Very interesting question from Zahrein in this thread: “how to manage an embedded USB 3.0 PHY Verification”? To clearly position the problem, Zahrein need to run the RTL verification of a complete SoC integrating an USB 3.0 function, that is the Controller (digital) and the PHY (Analog Mixed Signal) embedded in the SoC. The question,… Read More
Intro
My first exposure to hardware prototyping was at Intel back in 1980 when the iAPX 432 chip-set group decided to build a TTL-based wire-wrap prototype of a 32 bit processor to execute the Ada language. The effort to create the prototype took much longer than expected and was only functional a few months before silicon came back.… Read More
