Background
Traditionally, the interface between chip designers and system power, packaging, reliability, and mechanical engineering teams was a relatively straightforward exchange of specifications. Chip designers developed preliminary power dissipation estimates, often based on a simplifying power/mm**2 value. … Read More
System-in-package (SiP) designs for high-performance computing (HPC), high-speed networking, and AI applications are extremely complex. To achieve maximum performance without exceeding tight thermal and power constraints, these chips must be designed within the context of the package and the overall system. Ansys 2.5D/3D-IC… Read More
ANSYS recently hosted a webinar talking about how they used the big-data analytics available in RedHawk-SC to do early power grid planning with static analytics, providing better coverage than would have been possible through pure simulation-based approaches. The paradox here is that late-stage analysis of voltage drops … Read More
