I’ve known about DRC (Design Rule Checking) for IC design, and the same approach can also be applied to PCB design. The continuous evolution of electronics has led to increasingly intricate PCB designs that require Electrical Rule Checking (ERC) to ensure that performance goals are met. This complexity poses several challenges… Read More
At the heart of the shift-left strategy is the goal of moving traditionally late-stage tasks—such as software development, validation, and optimization—earlier in the design process. This proactive approach allows teams to identify and resolve issues before they escalate, reducing costly rework and shortening the overall… Read More
Improve productivity by shifting left LVS
In modern semiconductor design, technology nodes continue to shrink and the complexity and size of circuits increase, making layout versus schematic (LVS) verification more challenging. One of the most critical errors designers encounter during LVS runs are shorted nets. Identifying… Read More
Functional coverage acts as a guide to direct verification resources by identifying the tested and untested portions of a design. Functional coverage is a user-defined metric that assesses the extent to which the design specification, as listed by the test plan’s features, has been used. It can be used to estimate the presence… Read More
The complexity of System-on-Chip (SoC) designs continues to rise at an accelerated rate, with design complexity doubling approximately every two years. This increasing complexity makes verification a more difficult and time-consuming task for design engineers. Among the key verification challenges is managing reset domain… Read More
Embracing cloud computing is highly attractive for users of electronic design automation (EDA) tools and flows because of the productivity gains and time to market advantages that it can offer. For Siemens EDA customers engaged in designing large, cutting-edge chips at advanced nanometer scales, running Calibre® design stage… Read More
In my 40 years, I have worked for dozens of companies and just about everyone of them was acquired. Some of the acquisitions were accretive and some were not. Probably the best and most accretive one would be the Solido acquisition by Siemens EDA in 2017. I worked for Solido for ten years reporting to CEO Amit Gupta. I handled Taiwan … Read More
Dan is joined by Marc Hutner. Marc has been innovating in the areas of design, test, DFT and data analytics for more than 20 years. In June of 2023, he joined the Siemens EDA Tessent group as the product director of Silicon Learning, enabling how silicon data is applied to yield improvement and silicon debug. Previously, he worked … Read More
Dan is joined by Dr. John Ferguson, senior director of marketing for the Calibre product line at Siemens EDA. John has worked extensively in physical design verification. Current activities include efforts to extend physical verification and PDK enablement for 3DIC design and silicon photonics.
Dan explores the Siemens EDA… Read More
Visitors to Siemens’ booth (#2521) at the 61st Design Automation Conference (DAC) will see on display the Veloce™ CS system that unifies hardware emulation, enterprise prototyping and software prototyping into one hardware-assisted verification and validation platform.
The display will feature the three single-blade … Read More
