The Synopsys VC Formal group have a real talent for finding industry speakers to talk on illuminating outside-the-box-topics in formal verification. Not too long ago I covered an Intel talk of this kind. A recent webinar highlighted use of formal methods used together with a cool technique I have covered elsewhere called Quick… Read More
Tag: risc-v
Qualitative Shift in RISC-V Targets Raises Verification Bar
I had grown comfortable thinking about RISC-V as a cost-saving and more flexible alternative to Intel/AMD or Arm in embedded applications. Where clearly it is already doing very well. But following a discussion with Dave Kelf and Adnan Hamid of Breker, RISC-V goals have become much more ambitious, chasing the same big system applications… Read More
Breker’s Maheen Hamid Believes Shared Vision Unifying Factor for Business Success
Maheen Hamid, a member of the ESD Alliance (a SEMI Technology Community) Governing Council and a member of SEMI’s North America Advisory Board, is an astute business executive. Together with her husband Adnan Hamid, they founded Breker Verification Systems, a company developing test synthesis solutions. She serves today … Read More
Upskill Your Smart Soldiers and Conquer the Chip War in Style!
My recent article, ‘Chip War without Soldiers’ explained the importance of upskilling and preparing the chip design workforce in this current scenario, and it also explained how it will lead to ‘Fabs without Chips’ if we don’t prioritize it. VLSI Engineers are the pillars of the semiconductor industry, and they can only transform… Read More
Podcast EP157: The Differentiated Role Andes Plays in the US with Charlie Cheng
Dan is joined by Charlie Cheng, Managing Director of Polyhedron. Prior to that, Charlie was the CEO of Kilopass Technology, where he grew the core memory business into a successful acquisition by Synopsys. Before that, Charlie was an Entrepreneur in Residence at US Venture Partners and a Corporate VP at Faraday Technology, a Taiwanese… Read More
Maven Silicon’s RISC-V Processor IP Verification Flow
RISC-V is a general-purpose license-free open Instruction Set Architecture [ISA] with multiple extensions. It is an ISA separated into a small base integer ISA, usable as a base for customized accelerators and optional standard extensions to support general-purpose software development. RISC-V supports both 32-bit and … Read More
VeriSilicon’s VeriHealth Chip Design Platform for Smart Healthcare Applications
The wearables electronics market is a large and fast growing one. According to Precedence Research, the global wearable technology market is expected to grow at a compound annual growth rate of 13.89% during the forecast period 2022 to 2030. Precedence estimated the global wearable technology market size at USD 121.7 billion… Read More
Re-configuring RISC-V Post-Silicon
How do you reconfigure system characteristics? The answer to that question is well established – through software. Make the underlying hardware general enough and use platform software to update behaviors and tweak hardware configuration registers. This simple fact drove the explosion of embedded processors everywhere … Read More
Is your career at RISK without RISC-V?
I am delighted to share my technical insights into RISC-V in this article to inspire and prepare the next generation of chip designers for the future of the open era of computing. If you understand how we build complex electronic devices like desktops and smartphones using processors, you would be more interested in learning and… Read More
Chiplets at the Design Automation Conference with OpenFive
SemiWiki has been tracking the popularity of chiplets for two years now so it was not surprising to see that they played a key role at DAC. The other trend we foresaw was that the ASIC companies would be early chiplet adopters and that has proven true. One of the more vocal proponents of chiplets at DAC#59 was OpenFive, a 17+ year spec-to-silicon… Read More