SiFive, founded by the original creators of the RISC-V instruction set, has become the leading independent supplier of RISC-V processor IP. More than two billion devices already incorporate SiFive designs, ranging from camera controllers and SSDs to smartphones and automotive systems. The company no longer sells its own chips,… Read More
Tag: risc-v
Beyond Von Neumann: Toward a Unified Deterministic Architecture
By Thang Tran
For more than half a century, the foundations of computing have stood on a single architecture: the Von Neumann or Harvard model. Nearly all modern chips—CPUs, GPUs, and even many specialized accelerators—rely on some variant of this design. Over time, the industry has layered on complexity and specialization to… Read More
Andes RISC-V CON Munich
Beyond Traditional OOO: A Time-Based, Slice-Based Approach to High-Performance RISC-V CPUs
For decades, high-performance CPU design has been dominated by traditional out-of-order (OOO) execution architectures. Giants like Intel, Arm, and AMD have refined this approach into an industry standard—balancing performance and complexity through increasingly sophisticated schedulers, speculation, and runtime … Read More
Basilisk at Hot Chips 2025 Presented Ominous Challenge to IP/EDA Status Quo
At Hot Chips 2025, Philippe Sauter of ETH Zürich presented Basilisk, a project that may redefine what’s possible with open-source hardware. Basilisk is a 34 mm² RISC-V SoC fabricated at IHP Microelectronics on its open-source 130nm BiCMOS process in Germany. Basilisk, named after the Greco-Roman mythical creature known… Read More
RISC-V Automotive Conference 2025
About this event
Taking place in Munich the same week as the IAA Mobility show and across the street from the main IAA expo, the RISC-V Automotive Conference 2025 brings together the worldwide automotive ecosystem to discuss the amazing momentum and opportunities of RISC-V in automotive.
Event Program
- 14:00 – 14.15 Keynote:
Can RISC-V Help Recast the DPU Race?
ARM’s Quiet Coup in DPUs
The datacenter is usually framed as a contest between CPUs (x86, ARM, RISC-V) and GPUs (NVIDIA, AMD, custom ASICs). But beneath those high-profile battles, another silent revolution has played out: ARM quietly displaced Intel and AMD in the Data Processing Unit (DPU) market.
DPUs — also called SmartNICs… Read More
RISC-V Summit North America 2025
RISC-V is defining the future of open computing by providing unprecedented freedom to innovate. More than 13 billion RISC-V cores have shipped, powering new innovations in AI/ML, wireless, automotive, data center, space, IoT, embedded and more. Each day, thousands of engineers around the world collaborate and contribute
Podcast EP294: An Overview of the Momentum and Breadth of the RISC-V Movement with Andrea Gallo
Dan is joined by Andrea Gallo, CEO of RISC-V International, the non-profit home of the RISC-V instruction set architecture standard, related specifications, and stakeholder community. Prior to joining RISC-V International, Gallo worked in leadership roles at Linaro for over a decade. He built Linaro’s server engineering… Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot
In 2003, legendary computer architect Michael J. Flynn issued a warning that most of the industry wasn’t ready to hear. The relentless march toward more complex CPUs—with speculative execution, deep pipelines, and bloated instruction handling—was becoming unsustainable. In a paper titled “Computer Architecture … Read More