WEBINAR: Efficient and User-Friendly Analog IP Migration

WEBINAR: Efficient and User-Friendly Analog IP Migration
by Daniel Nenni on 12-01-2021 at 10:00 am

There have always been good reasons to port designs to new foundries or processes. These reasons have included reusing IP in new projects, moving an entire design to a smaller node to improve PPA, or second sourcing manufacturing.

While there can be many potential business motivations for any of the above, in today’s environment… Read More


When it Comes to Process Migration, “Standard Cells” are Anything But

When it Comes to Process Migration, “Standard Cells” are Anything But
by Tom Simon on 08-22-2018 at 12:00 pm

Standard cell library developers are faced with a daunting task when it is time to create a library for a new process node. Porting an existing library can be a big help, but even then, manual modifications to 800 or more cells is still required. Each of those cells has many geometric elements are that affected by new design rules. All… Read More


Whitepaper : The True Costs of Process Node Migration

Whitepaper : The True Costs of Process Node Migration
by Mitch Heins on 08-09-2017 at 12:00 pm

Mentor, A Siemens Business, just released a new white paper entitled, “The True Costs of Process Node Migration” written by John Ferguson. This is a good quick read that highlights some of the key areas that are often over looked when contemplating a shift of process nodes for your next design.

When considering a shift to a more advanced… Read More


Sagantec’s nmigrate adopted and deployed for 14nm technology

Sagantec’s nmigrate adopted and deployed for 14nm technology
by Daniel Nenni on 05-29-2013 at 3:00 pm

Major semiconductor company successfully migrated 28nm libraries to 14nm FinFET

Santa Clara, California – May 29, 2013 – Sagantec announced that its nmigrate tool was adopted by a major semiconductor company for the development of standard cell libraries at 14nm and 16nm FinFET technologies.
This customer already… Read More


Sagantec Update: More EDA Consolidation!

Sagantec Update: More EDA Consolidation!
by Daniel Nenni on 05-08-2012 at 7:00 pm

Adding sophisticated 2D dynamic compaction technology to address 20nm and 14nm challenges. Santa Clara, California – May 3 ,2012 – Sagantec today announced that it has acquired Dutch startup NP-Komplete Technologies BV (Eindhoven, The Netherlands) for its physical design compaction and migration solutions based on a sophisticatedRead More


Sagantec 2 Migrate iPad2s @ #48DAC

Sagantec 2 Migrate iPad2s @ #48DAC
by admin on 05-30-2011 at 2:53 pm

Sagantec is the leading EDA provider of process migration solutions for custom IC design. Sagantec’s EDA solutions enable IC designers to leverage their investment in existing physical design IP and accomplish dramatic time and effort savings in the implementation of custom, analog, mixed-signal and memory circuits… Read More


65nm to 45nm SerDes IP Migration Success Story

65nm to 45nm SerDes IP Migration Success Story
by Daniel Nenni on 05-25-2011 at 3:43 pm

The problem:To move a single lane variable data rate SerDes (serializer-deserializer) from a 65nm process to a 45nm process, achieving a maximum performance of up to 10.3 Gbps. This is a large piece of complex mixed-signal IP with handcrafted analog circuits. Circuit performance and robustness are critical and must be maintainedRead More


Adjusting Custom IP to Process Changes

Adjusting Custom IP to Process Changes
by Daniel Nenni on 05-16-2011 at 1:57 pm

A High-Definition Multimedia Interface (HDMI) IP core was being implemented in an advanced process technology. This fairly large and complex analog mixed-signal (AMS) IP comprising over 130K devices was close to being finalized and shipped to the customer. But many design rules at the foundry were unexpectedly changed fromRead More


Semiconductor Wafer Allocation and Design Migration

Semiconductor Wafer Allocation and Design Migration
by Daniel Nenni on 08-12-2009 at 8:00 pm

In the name of blogging and increased transparency lets talk about wafer allocation, because it’s coming, believe it. There is already a significant delta between wafer demand and manufacture due to record low inventory levels and the exploding semiconductor demand in China. Both TSMC and UMC posted good July sales numbers: … Read More