Cocotb for Verification. Innovation in Verification

Cocotb for Verification. Innovation in Verification
by Bernard Murphy on 08-27-2025 at 6:00 am

Innovation New

This time let’s see if we can stir up some lively debate. Cocotb isn’t new but it is an interesting alternative to mainstream testing methodologies. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series … Read More


Reducing Compile Time in Emulation. Innovation in Verification

Reducing Compile Time in Emulation. Innovation in Verification
by Bernard Murphy on 03-25-2021 at 6:00 am

Innovation image 2021

Is there a way to reduce cycle time in mapping large SoCs to an FPGA-based emulator? Paul Cunningham (GM, Verification at Cadence), Jim Hogan (RIP) and I continue our series on research ideas. As always, feedback welcome.

The Innovation

This month’s pick is Improving FPGA-Based Logic Emulation Systems through Machine LearningRead More