Chips&Media has announced a data compression technology aimed at one of the constraints in artificial intelligence hardware: moving data fast enough to keep processors busy. The South Korean semiconductor intellectual property supplier says its new Feature Map Compression IP marks an expansion beyond video applications… Read More
Tag: npu
WEBINAR: The Convergence of Edge Accelerators
The rapid growth of AI at the edge is forcing SoC architects to rethink traditional processor designs. Dedicated NPUs deliver impressive performance for today’s models, but evolving AI workloads, increasing system complexity and growing pressure on power and silicon budgets are exposing the limitations of fixed-function… Read More
Webinar: The Convergence of Edge Accelerators
*Company Email Required for Registration*
ABSTRACT
Neural rendering. Offloading overloaded NPUs. Protection against evolving AI models. Developer-friendly programming. Reduced system complexity. There are many reasons why edge AI systems benefit from a GPU that delivers fast, efficient and fully programmable AI acceleration.… Read More
WAVE-N Specialized Video Processing NPU for Edge AI Systems
The rapid growth of AI applications in edge devices has created a strong demand for specialized hardware capable of performing high-performance neural network inference under strict power and latency constraints. Traditional CPUs and GPUs often struggle to meet the efficiency requirements of embedded and mobile systems.… Read More
NXP Expands Arteris NoC Deployment to Scale Edge AI Architectures
As edge AI systems become more centralized and compute-dense, on-chip data movement is increasingly the architectural bottleneck. NXP’s expanded deployment of Arteris network-on-chip (NoC) and cache-coherent interconnect IP highlights a broader industry trend: interconnect architecture is now a first-order design … Read More
Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion Silicon
The explosive growth of AI and accelerated computing is placing unprecedented demands on system-on-chip (SoC) design. Modern AI workloads require extremely high bandwidth, ultra-low latency, and energy-efficient data movement across increasingly heterogeneous architectures. As SoCs scale to incorporate clusters of… Read More
Ceva Unleashes Wi-Fi 7 Pulse: Awakening Instant AI Brains in IoT and Physical Robots
In the rapidly evolving landscape of connected devices, where artificial intelligence meets the physical world, Ceva has unveiled a groundbreaking solution: the Ceva-Waves Wi-Fi 7 1×1 client IP. Announced on October 21, 2025, this IP core is designed to supercharge AI-enabled IoT devices and pioneering physical AI systems,… Read More
A Novel Approach to Future Proofing AI Hardware
There is a built-in challenge for edge AI intended for long time-in-service markets. Automotive applications are the obvious example, while aerospace and perhaps medical usage may impose similar demands. Support for the advanced AI methods we now expect – transformers, physical and agentic AI – is not feasible without dedicated… Read More
From All-in-One IP to Cervell™: How Semidynamics Reimagined AI Compute with RISC-V
In an era where artificial intelligence workloads are growing in scale, complexity, and diversity, chipmakers are facing increasing pressure to deliver solutions that are not only fast, but also flexible and programmable. Semidynamics recently announced Cervell™, a fully programmable Neural Processing Unit (NPU) designed… Read More
Semidynamics: A Single-Software-Stack, Configurable and Customizable RISC-V Solution
Founded with a vision to create transformative, customizable IP solutions, Semidynamics has emerged as a significant player in the AI hardware industry. Initially operating as a design engineering company, Semidynamics spent its early years exploring various pathways before pivoting to develop proprietary intellectual… Read More
