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EDPS: 3D ICs, part IIby Paul McLellan on 04-12-2012 at 10:00 pmCategories: EDA, Events
Part I is here.
In the panel session at EDPS on 3D IC a number of major issues got highlighted (highlit?).
The first is the problem of known-good-die (KDG) which is what killed off the promising multi-chip-module approach, perhaps the earliest type of interposer. The KDG problem is that with a single die in a package it doesn’t… Read More
