Webinar: How to achieve 95%+ Accurate power measurement during architecture exploration?

Webinar: How to achieve 95%+ Accurate power measurement during architecture exploration?
by Admin on 10-31-2023 at 3:39 pm

Description

During the conceptualization and architectural exploration phases, it is crucial to assess the power budget.

Would you like to accurately measure the:

1. Power consumed for a proposed embedded software or firmware?

2. Savings of a Power Management Algorithm prior to development?

3. Power impact of hardware configuration… Read More


Mirabilis Invites System Architects at DAC 2023 in San Francisco

Mirabilis Invites System Architects at DAC 2023 in San Francisco
by Daniel Payne on 07-07-2023 at 10:00 am

visualsim architect min

System architects have a difficult task of choosing the most efficient architecture by exploring alternative approaches, while tracking and testing requirements. Using a Model-Based Systems Engineering (MBSE) approach is recommended to achieve these goals,  before getting mired in low-level implementation details like… Read More


Webinar: Choosing the best modeling abstraction for your analysis?

Webinar: Choosing the best modeling abstraction for your analysis?
by Admin on 04-03-2023 at 3:25 pm

This webinar cover the modeling abstraction in the design of electronics, semiconductors and software. This webinar will definitely improve your modeling skills!

–Is the abstraction right for your application and design goal?

–How do you accelerate the simulation using abstraction?

–Can you change the model of computation

Read More

Mapping SysML to Hardware Architecture

Mapping SysML to Hardware Architecture
by Daniel Payne on 04-03-2023 at 10:00 am

SysML to VisualSim, Media App min

The Systems Modeling Language (SysML) is used by systems engineers that want to specify, analyze, design, verify and validate a specific system. SysML started out as an open-source project, and it’s a subset of the Unified Modeling Language (UML). Mirabilis Design has a tool called VisualSim Architect that imports your… Read More


System-Level Modeling using your Web Browser

System-Level Modeling using your Web Browser
by Daniel Payne on 09-27-2021 at 10:00 am

VisualSim example

I’ve simulated IC designs at the transistor-level with SPICE, gate-level, RTL with Verilog, and even used cycle-based functional simulators. Sure, they each worked well, but only for the domain and purpose they were designed for. Industry analyst, Gary Smith predicted that the IC world would soon move to system-level… Read More