Computational Lithography, Scaling’s Best Friend

Computational Lithography, Scaling’s Best Friend
by glforte on 11-03-2010 at 11:51 pm

attachment

By Joseph Sawicki, Vice President & General Manager, Design to Silicon Division

It is one of the more amazing stories in the continued march of Moore’s Law over the past four nodes. Previously scaling was enabled solely though changes in the physical domain, whether through decreasing the wavelength of light, increasing … Read More


Critical Area Analysis and Memory Redundancy

Critical Area Analysis and Memory Redundancy
by SStalnaker on 10-08-2010 at 8:08 pm

Simon Favre, one of our Calibre Technical Marketing Engineers, presented a paper on Critical Area Analysis and Memory Redundancy at the 2010 IEEE North Atlantic Test Workshop in Hopewell Junction, NY, just up the road from Fishkill. As Simon says…

Fishkill, New York. IBM is in Fishkill. IBM invented Critical Area Analysis in what,… Read More