The Semiconductor Landscape – II

The Semiconductor Landscape – II
by Pawan Fangaria on 01-01-2013 at 9:15 pm

It has been a year since my article Semiconductor Landscape in Jan 2012 I wanted to look back into the major events over the year and then anticipate what’s in store going forward. What has happened over the year is much more than what I could foresee. Major consolidation in EDA space – Synopsys acquired Magma, SpringSoft, Ciranova,Read More


Analog Circuit Optimization

Analog Circuit Optimization
by Daniel Payne on 04-18-2012 at 2:06 pm

Gim Tan at Magma did a webinar on analog circuit optimization, so I watched it today to see what I could learn about their approach. Gim is a Staff AE, so not much marketing fluff to wade through in this webinar.

The old way of designing custom analog circuits involves many tedious and error prone iterations between front-end (Schematic… Read More


Speeding SoC timing closure

Speeding SoC timing closure
by Paul McLellan on 01-12-2012 at 1:42 am

As chips have become larger, one of the more challenging steps is full-chip signoff. Lots of other steps in the design process can work on just a part of the problem, but by definition full-chip signoff has to work on the full chip. But it is not just that chips have got larger, the number of corners that need to be validated has also exploded.… Read More


Imera Virtual Fabric

Imera Virtual Fabric
by Paul McLellan on 01-10-2012 at 6:00 am

Virtual fabric sounds like something that would be good for making the emperor’s new clothes. I talked today to Les Spruiell of Imera to find out what it really is.

Anyone who has worked as either a designer or as an EDA engineer has had the problem of a customer who has a problem but can’t send you the design since it is (a)… Read More


What Dolpin Technology Uses for SPICE Circuit Simulation of IP

What Dolpin Technology Uses for SPICE Circuit Simulation of IP
by Daniel Payne on 01-06-2012 at 12:32 pm

Mo Tamjidi founded two Semiconductor IP companies Virage Logic and Dolphin Technology. After reading a press release about how Dolphin Technology is using FineSIM SPICE from Magma I decided to contact him and learn more about why they are now using that circuit simulator in the design of their memory, standard cells, and IO cells.… Read More


Synopsys Eats Magma: What Really Happened with Winners and Losers!

Synopsys Eats Magma: What Really Happened with Winners and Losers!
by Daniel Nenni on 12-10-2011 at 6:00 pm

Conspiracy theories abound! The inside story of the Synopsys (SNPS) acquisition of Magma (LAVA) brings us back to the 1990’s tech boom with shady investment bankers and pump/dump schemes. After scanning my memory banks and digging around Silicon Valley for skeletons with a backhoe here is what I found out:

The Commission… Read More


SPICE Circuit Simulation at Magma

SPICE Circuit Simulation at Magma
by Daniel Payne on 11-11-2011 at 11:36 am

All four of the public EDA companies offer SPICE circuit simulation tools for use by IC designers at the transistor-level, and Magma has been offering two SPICE circuit simulators:

  • FineSIM SPICE (parallel SPICE)
  • FineSIM PRO (accelerated, parallel SPICE)

An early advantage offered by Magma was a SPICE simulator that could be … Read More


AMS Design, Optimization and Porting

AMS Design, Optimization and Porting
by Daniel Payne on 09-19-2011 at 2:35 pm

AMS design flows can follow a traditional path or consider trying something new. The traditional path goes along the following steps:
[LIST=1]

  • Design requirements
  • Try a transistor-level schematic
  • Run circuit simulation
  • Compare the simulated results versus the requirements, re-size the transistors and go back to step 3 or
  • Read More

    Cadence ClosedAccess

    Cadence ClosedAccess
    by Paul McLellan on 09-11-2011 at 4:00 pm

    There are various rumors around about Cadence starting to close up stuff that has been open for a long time. Way back in the midst of time, as part of the acquisition of CCT, the Federal Trade Commission forced Cadence to open up LEF/DEF and allow interoperability of Cadence tools (actually only place and route) I believe for 10 years.… Read More