Lint for Implementation

Lint for Implementation
by Bernard Murphy on 08-29-2019 at 6:00 am

When I was at Atrenta, we took advantage of opportunities to expand our static tool (aka linting) first to clock domain crossing (CDC) analysis and DFT compatibility and later to static analysis of timing constraints, all of which have importance in implementation. CDC is commonly thought of as an RTL-centric analysis, however,… Read More


High-Speed Equivalence Checking

High-Speed Equivalence Checking
by Bernard Murphy on 09-28-2017 at 7:00 am

Following on product introductions for simulation and prototyping, physical verification and implementation earlier in the year, Anirudh Devgan (Exec VP and GM at Cadence), the king of speed and parallelism has done it again, this time with logic equivalence checking (LEC). Cadence recently announced an advance to their well-known… Read More