Building the Interconnect Foundation: Bump and TSV Planning for Multi-Die Systems

Building the Interconnect Foundation: Bump and TSV Planning for Multi-Die Systems
by Kalar Rajendiran on 03-03-2026 at 10:00 am

UCIe bump planning in 3DIC Compiler Platform

The first article in this series examined how feasibility exploration (hyperlink to SemiWiki first article) enables architects to evaluate multi-die system configurations while minimizing early design risk. Once architectural decisions are validated, designers must translate conceptual connectivity requirements … Read More


How Customized Foundation IP Is Redefining Power Efficiency and Semiconductor ROI

How Customized Foundation IP Is Redefining Power Efficiency and Semiconductor ROI
by Kalar Rajendiran on 02-26-2026 at 10:00 am

chip design for blog

As computing expands from data centers to edge devices, semiconductor designers face increasing pressure to optimize both performance and energy efficiency. Advanced process nodes continue to provide transistor-level improvements, but scaling alone cannot meet the demands of hyperscale AI infrastructure or ultra-low-power… Read More


Accelerating Static ESD Simulation for Full-Chip and Multi-Die Designs with Synopsys PathFinder-SC

Accelerating Static ESD Simulation for Full-Chip and Multi-Die Designs with Synopsys PathFinder-SC
by Kalar Rajendiran on 02-17-2026 at 10:00 am

SNPS PathFinder SC ESD Verification

As analog and mixed-signal designs become increasingly complex, parasitic effects dominate both design time and cost, consuming 30–50% of engineers’ effort in debugging and reanalyzing circuits. Addressing these multiphysics effects requires early verification strategies and reliable simulation solutions. Modern … Read More


How Memory Technology Is Powering the Next Era of Compute

How Memory Technology Is Powering the Next Era of Compute
by Kalar Rajendiran on 02-11-2026 at 10:00 am

How AI is Shaping the Memory Market Title Slide

For more than a decade, progress in artificial intelligence has been framed almost entirely through the lens of compute. Faster GPUs, denser accelerators, and higher TOPS defined each new generation. But as generative and agentic AI enter their next phase, that framing is no longer sufficient. The most advanced AI systems today… Read More


Why PDF Solutions Is Positioning Itself at the Center of the Semiconductor Ecosystem

Why PDF Solutions Is Positioning Itself at the Center of the Semiconductor Ecosystem
by Kalar Rajendiran on 02-10-2026 at 6:00 am

PDF Solutions Thank You

The semiconductor industry is on track to exceed one trillion dollars in annual revenue by the end of the decade, propelled by AI, advanced computing, and edge applications. Yet beneath this growth lies a structural shift. Manufacturing complexity is rising faster than the industry’s ability to manage it. As architectures move… Read More


How 25G Ethernet, PCIe 5.0, and Multi-Protocol PHYs Enable Scalable Edge Intelligence

How 25G Ethernet, PCIe 5.0, and Multi-Protocol PHYs Enable Scalable Edge Intelligence
by Kalar Rajendiran on 02-03-2026 at 6:00 am

Ethernet Links Enabling In Vehicle Network and ADAS

Physical AI is changing how intelligent systems interact with the real world. These systems must sense, process, and respond to data in real time. Unlike cloud AI, Physical AI depends on fast local processing and reliable distributed communication. This shift creates a new challenge. Systems must move large volumes of sensor… Read More


Hierarchical Device Planning as an Enabler of System Technology Co-Optimization

Hierarchical Device Planning as an Enabler of System Technology Co-Optimization
by Kalar Rajendiran on 01-27-2026 at 6:00 am

Connectivity in a Hierarchical IC Package Floorplan

AI, hyperscale data centers, and data-intensive workloads are driving unprecedented demands for performance, bandwidth, and energy efficiency. As the economic returns of traditional transistor scaling diminish, advanced IC packaging and heterogeneous integration have become the primary levers for system-level scaling.… Read More


Manufacturing Is Strategy: Leadership Lessons from the Semiconductor Front Lines

Manufacturing Is Strategy: Leadership Lessons from the Semiconductor Front Lines
by Kalar Rajendiran on 01-21-2026 at 10:00 am

PDF Fireside Chat Dinner Wideshot Dec 3, 2025

This article is an editorial synthesis of a fireside chat between Tom Caulfield, Executive Chairman of GlobalFoundries, and John Kibarian, CEO of PDF Solutions that took place on December 3rd 2025, during the PDF Solutions Users Conference. John Kibarian led the conversation to get Tom Caulfield’s perspectives on leadership… Read More


Podcast EP156: A Chat With Shankar Krishnamoorthy About Strategy and Outlook for EDA Development at SNUG

Podcast EP156: A Chat With Shankar Krishnamoorthy About Strategy and Outlook for EDA Development at SNUG
by Daniel Nenni on 04-21-2023 at 10:00 am

This is another special edition of our podcast series. SemiWiki staff writer Kalar Rajendiran spoke with Shankar Krishnamoorthy, General Manager, Electronic Design Automation Group for Synopsys at the recent SNUG meeting,

Shankar discusses how Synopsys is focusing on hyperconvergence and implementation of AI across the… Read More