The first article in this series examined how feasibility exploration (hyperlink to SemiWiki first article) enables architects to evaluate multi-die system configurations while minimizing early design risk. Once architectural decisions are validated, designers must translate conceptual connectivity requirements … Read More
Tag: Kalar Rajendiran
How Customized Foundation IP Is Redefining Power Efficiency and Semiconductor ROI
As computing expands from data centers to edge devices, semiconductor designers face increasing pressure to optimize both performance and energy efficiency. Advanced process nodes continue to provide transistor-level improvements, but scaling alone cannot meet the demands of hyperscale AI infrastructure or ultra-low-power… Read More
Accelerating Static ESD Simulation for Full-Chip and Multi-Die Designs with Synopsys PathFinder-SC
As analog and mixed-signal designs become increasingly complex, parasitic effects dominate both design time and cost, consuming 30–50% of engineers’ effort in debugging and reanalyzing circuits. Addressing these multiphysics effects requires early verification strategies and reliable simulation solutions. Modern … Read More
How Memory Technology Is Powering the Next Era of Compute
For more than a decade, progress in artificial intelligence has been framed almost entirely through the lens of compute. Faster GPUs, denser accelerators, and higher TOPS defined each new generation. But as generative and agentic AI enter their next phase, that framing is no longer sufficient. The most advanced AI systems today… Read More
Why PDF Solutions Is Positioning Itself at the Center of the Semiconductor Ecosystem
The semiconductor industry is on track to exceed one trillion dollars in annual revenue by the end of the decade, propelled by AI, advanced computing, and edge applications. Yet beneath this growth lies a structural shift. Manufacturing complexity is rising faster than the industry’s ability to manage it. As architectures move… Read More
How 25G Ethernet, PCIe 5.0, and Multi-Protocol PHYs Enable Scalable Edge Intelligence
Physical AI is changing how intelligent systems interact with the real world. These systems must sense, process, and respond to data in real time. Unlike cloud AI, Physical AI depends on fast local processing and reliable distributed communication. This shift creates a new challenge. Systems must move large volumes of sensor… Read More
Hierarchical Device Planning as an Enabler of System Technology Co-Optimization
AI, hyperscale data centers, and data-intensive workloads are driving unprecedented demands for performance, bandwidth, and energy efficiency. As the economic returns of traditional transistor scaling diminish, advanced IC packaging and heterogeneous integration have become the primary levers for system-level scaling.… Read More
Manufacturing Is Strategy: Leadership Lessons from the Semiconductor Front Lines
This article is an editorial synthesis of a fireside chat between Tom Caulfield, Executive Chairman of GlobalFoundries, and John Kibarian, CEO of PDF Solutions that took place on December 3rd 2025, during the PDF Solutions Users Conference. John Kibarian led the conversation to get Tom Caulfield’s perspectives on leadership… Read More
Podcast EP156: A Chat With Shankar Krishnamoorthy About Strategy and Outlook for EDA Development at SNUG
This is another special edition of our podcast series. SemiWiki staff writer Kalar Rajendiran spoke with Shankar Krishnamoorthy, General Manager, Electronic Design Automation Group for Synopsys at the recent SNUG meeting,
Shankar discusses how Synopsys is focusing on hyperconvergence and implementation of AI across the… Read More
